From patchwork Wed Jun 12 20:20:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1947111 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=h7W2/7bt; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VzxkN3DvTz20KL for ; Thu, 13 Jun 2024 06:20:42 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B31D03882064 for ; Wed, 12 Jun 2024 20:20:40 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [69.48.154.134]) by sourceware.org (Postfix) with ESMTPS id 75B8D3882049 for ; Wed, 12 Jun 2024 20:20:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 75B8D3882049 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 75B8D3882049 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=69.48.154.134 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718223619; cv=none; b=Lb8tmnx2DtPeAvy4+M4CAqz4bmYo5G7ho4e8+Otkg/3QgQ/FAx7zuFGsL4E7O0tsyO1B7FWnYtrRtduNlz0Gy0qLQZ07MhWCjMhYg0Bmd9IhdieeNTfJhfAUL4zCmfn4yP85aYOJaiOSsKtlssgyMND9ybrhHClbSuy7nIrLfow= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718223619; c=relaxed/simple; bh=G+1dHkP0yjmS9pE5NMgrhOOaFTsZbuNoOX/ikB9vnj8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Q1654x4qRvI0nArhxVC8j3+Y0qt/FlewcjwD9l4ZydrvXM/I3naFG+MgHPs9W+IY9J34g8J65OEH9c4I9fU1Brmzplg3UG4Sk5NYmO48o/UjRTpPifPUrAKn1osDfSQi2vJAdgITWN3t3AEg9ORdv62AXF9VYyIbJbY5vdH6qkU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=BK13TI2oowQSijnaR+Pid6hffP6jCc0maZ7nlKPahNQ=; b=h7W2/7btF9p3oP/fDNTccSOWEV zQxFRt0iXSf9s5x06t/HIF4+9tj/NwMOCIZF9SslVY9BdjeK4+U10T7OLSQ13MisGbzuXPwTtzOsp cYVakmeXA50YyPbHe+WYIlsf2SbFll+4GQYhweYOanjF2QgNCsFNEtapT9udmJAtO48iGhLC+wPnB +a1MXOtRZj3mYlr7Q1vOCT4mISzcuZbrLahvgQY34y1kpn5c0zbR8o55TxIxi2gns3h0XtSwmoVbp TSrQ4PkHwrJK8XmVQgsVUveocqBe8Pgnmw6ltV2bxr131QtK+E7D5gvz9MfCTJhS8mP9nUSBMTcOh vpHO526w==; Received: from [168.86.198.82] (port=58152 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1sHUS8-0000000FZOC-3drK; Wed, 12 Jun 2024 16:20:17 -0400 From: "Roger Sayle" To: Cc: "'Hongtao Liu'" , "'Uros Bizjak'" Subject: [x86 PATCH] More use of m{32,64}bcst addressing modes with ternlog. Date: Wed, 12 Jun 2024 21:20:14 +0100 Message-ID: <002201dabd05$efb5dbd0$cf219370$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adq9BQbxQwjjpR/rQr2BvsD/C2pypw== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch makes more use of m32bcst and m64bcst addressing modes in ix86_expand_ternlog. Previously, the i386 backend would only consider using a m32bcst if the inner mode of the vector was 32-bits, or using m64bcst if the inner mode was 64-bits. For ternlog (and other logic operations) this is a strange restriction, as how the same constant is materialized is dependent upon the mode it is used/operated on. Hence, the V16QI constant {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2} wouldn't use m??bcst, but (V4SI){0x02020202,0x02020202,0x02020202,0x02020202} which has the same bit pattern would. This can optimized by (re)checking whether a CONST_VECTOR can be broadcast from memory after casting it to VxSI (or for m64bst to VxDI) where x has the appropriate vector size. Taking the test case from pr115407: __attribute__((__vector_size__(64))) char v; void foo() { v = v | v << 7; } Compiled with -O2 -mcmodel=large -mavx512bw GCC 14 generates a 64-byte (512-bit) load from the constant pool: foo: movabsq $v, %rax // 10 movabsq $.LC0, %rdx // 10 vpsllw $7, (%rax), %zmm1 // 7 vmovdqa64 (%rax), %zmm0 // 6 vpternlogd $248, (%rdx), %zmm1, %zmm0 // 7 vmovdqa64 %zmm0, (%rax) // 6 vzeroupper // 3 ret // 1 .LC0: .byte -12 // 64 = 114 bytes .byte -128 ;; repeated another 62 times mainline currently generates two instructions, using interunit broadcast: foo: movabsq $v, %rdx // 10 movl $-2139062144, %eax // 5 vmovdqa64 (%rdx), %zmm2 // 6 vpbroadcastd %eax, %zmm0 // 6 vpsllw $7, %zmm2, %zmm1 // 7 vpternlogd $236, %zmm0, %zmm2, %zmm1 // 7 vmovdqa64 %zmm1, (%rdx) // 6 vzeroupper // 3 ret // 1 = 51 bytes With this patch, we now generate a broadcast addressing mode: foo: movabsq $v, %rax // 10 movabsq $.LC1, %rdx // 10 vmovdqa64 (%rax), %zmm1 // 6 vpsllw $7, %zmm1, %zmm0 // 7 vpternlogd $236, (%rdx){1to16}, %zmm1, %zmm0 // 7 vmovdqa64 %zmm0, (%rax) // 6 vzeroupper // 3 ret // 1 = 50 total Without -mcmodel=large, the benefit is two instructions: foo: vmovdqa64 v(%rip), %zmm1 // 10 vpsllw $7, %zmm1, %zmm0 // 7 vpternlogd $236, .LC2(%rip){1to16}, %zmm1, %zmm0 // 11 vmovdqa64 %zmm0, v(%rip) // 10 vzeroupper // 3 ret // 1 = 42 total This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2024-06-12 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86_expand_ternlog): Try performing logic operation in a different vector mode if that enables use of a 32-bit or 64-bit broadcast addressing mode. gcc/testsuite/ChangeLog * gcc.target/i386/pr115407.c: New test case. Thanks in advance, Roger diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 312329e..a4379b8 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -26041,6 +26041,69 @@ ix86_expand_ternlog (machine_mode mode, rtx op0, rtx op1, rtx op2, int idx, tmp2 = ix86_gen_bcst_mem (mode, op2); if (!tmp2) { + machine_mode bcst32_mode = mode; + machine_mode bcst64_mode = mode; + switch (mode) + { + case V1TImode: + case V4SImode: + case V4SFmode: + case V8HImode: + case V16QImode: + bcst32_mode = V4SImode; + bcst64_mode = V2DImode; + break; + + case V2TImode: + case V8SImode: + case V8SFmode: + case V16HImode: + case V32QImode: + bcst32_mode = V8SImode; + bcst64_mode = V4DImode; + break; + + case V4TImode: + case V16SImode: + case V16SFmode: + case V32HImode: + case V64QImode: + bcst32_mode = V16SImode; + bcst64_mode = V8DImode; + break; + + default: + break; + } + + if (bcst32_mode != mode) + { + tmp2 = gen_lowpart (bcst32_mode, op2); + if (ix86_gen_bcst_mem (bcst32_mode, tmp2)) + { + tmp2 = ix86_expand_ternlog (bcst32_mode, + gen_lowpart (bcst32_mode, tmp0), + gen_lowpart (bcst32_mode, tmp1), + tmp2, idx, NULL_RTX); + emit_move_insn (target, gen_lowpart (mode, tmp2)); + return target; + } + } + + if (bcst64_mode != mode) + { + tmp2 = gen_lowpart (bcst64_mode, op2); + if (ix86_gen_bcst_mem (bcst64_mode, tmp2)) + { + tmp2 = ix86_expand_ternlog (bcst64_mode, + gen_lowpart (bcst64_mode, tmp0), + gen_lowpart (bcst64_mode, tmp1), + tmp2, idx, NULL_RTX); + emit_move_insn (target, gen_lowpart (mode, tmp2)); + return target; + } + } + tmp2 = force_const_mem (mode, op2); rtx bcast = ix86_broadcast_from_constant (mode, tmp2); tmp2 = validize_mem (tmp2); diff --git a/gcc/testsuite/gcc.target/i386/pr115407.c b/gcc/testsuite/gcc.target/i386/pr115407.c new file mode 100644 index 0000000..b6cb7a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr115407.c @@ -0,0 +1,9 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mcmodel=large -mavx512bw" } */ +__attribute__((__vector_size__(64))) char v; + +void foo() { + v = v | v << 7; +} + +/* { dg-final { scan-assembler "vpternlog.*1to16" } } */