From patchwork Fri Jul 3 17:20:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1322571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=WzNGSElN; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49z1vL03xhz9sRk for ; Sat, 4 Jul 2020 03:20:44 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6251D3842412; Fri, 3 Jul 2020 17:20:41 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 067733844079 for ; Fri, 3 Jul 2020 17:20:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 067733844079 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=roger@nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:In-Reply-To:References:Cc:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=b6574jI7yPLuliznUjJTbIQ5vGzhrBpJPdLY2ErgXNk=; b=WzNGSElNhqxKJEyaC8ULDJ4O0 S2Vr6i9sPpOQBAGTRaJsE8JHQzoQN/cXi//gB8BWCWBipJyMRV0jIU+9CNVRzNR+4CaZ9OiSyOkUw XX3/fKes1Ygy8yeFaN+Z0y6i8Vzogim21Kkvou1FBXak1E84g27DS3+Ak5vei4rcNQMoe+vP7UVXw Z+djN4gkivFd8WTjfnrMlXFL+zXSRvjbQbIL8ZlOu5ot40fYNCfaE9aWcULM8hCjAG8ayQplT8jZ2 FtbkbfPuMyM7NdDN5LJ9em/rcVlwdwU0fUrRmEZ4IotXuKFHJ27rWKn1W7y2NeO0gZmuOW3BX8EBD eF7+ZRC9g==; Received: from [185.62.158.67] (port=58888 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1jrPMc-00046O-5d; Fri, 03 Jul 2020 13:20:38 -0400 From: "Roger Sayle" To: References: <000c01d64fa8$78551430$68ff3c90$@nextmovesoftware.com> <134f7b03-6042-2cc7-37e1-93f2f9002d37@suse.de> In-Reply-To: <134f7b03-6042-2cc7-37e1-93f2f9002d37@suse.de> Subject: [PATCH] nvptx: : Add support for popcount and widening multiply instructions Date: Fri, 3 Jul 2020 18:20:36 +0100 Message-ID: <000b01d6515e$44913130$cdb39390$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQJ4wRuc3ZhA4tpZbt+lSXy+vLbMbQHaRKrSp6JbkGA= Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" The following patch adds support for three-input addition instructions to the nvptx backend. The PTX ISA's "vadd.u32.u32.u32.add d, a, b, c" instruction effectively implements 32-bit d = a+b+c, and the "vsub.u32.u32.u32 d,a,b,c" instruction that provides 32-bit d = (a-b)+c. The hope is that these mnemonics help ptxas generate the low-level hardware's IADD3 instruction. Tested by "make" and "make -k check" on --build=nvptx-none hosted on x86_64-pc-linux-gnu with no new regressions. [PATCH] nvptx: Add support for vadd.add and vsub.add instructions 2020-07-03 Roger Sayle gcc/ChangeLog: * config/nvptx/nvptx.md (vadd_addsi4): New instruction. (vsub_addsi4): New instruction. gcc/testsuite/ChangeLog: * gcc.target/nvptx/vadd_add.c: New test. * gcc.target/nvptx/vsub_add.c: New test. Hopefully, I've got the patch/diff file format correct this time. Ok for mainline? Thanks in advance, Roger --- Roger Sayle NextMove Software Cambridge, UK -----Original Message----- From: Tom de Vries Sent: 02 July 2020 14:29 To: Roger Sayle ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] nvptx: : Add support for popcount and widening multiply instructions On 7/1/20 3:06 PM, Roger Sayle wrote: > > The following patch adds support for the popc and mul.wide instructions to the nvptx backend. > I've a follow-up patch for supporting mul.hi instructions, but those > changes require some minor tweaks to GCC's middle-end, so I'll submit those pieces separately. > > Tested by "make" and "make -k check" on --build=nvptx-none hosted on > x86_64-pc-linux-gnu with no new regressions. > > 2020-07-01 Roger Sayle > > gcc/ChangeLog: > * config/nvptx/nvptx.md (popcount2): New instructions. > (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions. > > gcc/testsuite/ChangeLog: > * gcc.target/nvptx/popc-1.c: New test. > * gcc.target/nvptx/popc-2.c: New test. > * gcc.target/nvptx/popc-3.c: New test. > * gcc.target/nvptx/mul-wide.c: New test. > * gcc.target/nvptx/umul-wide.c: New test. > > > Ok for mainline? > Hi Roger, LGTM, please apply. [ Btw, can you next time add the new files to the patch. That's somewhat more convenient to apply. ] Thanks - Tom diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md index 5ceeac7..11d1d35 100644 --- a/gcc/config/nvptx/nvptx.md +++ b/gcc/config/nvptx/nvptx.md @@ -373,6 +373,22 @@ "" "%.\\tadd%t0\\t%0, %1, %2;") +(define_insn "vadd_addsi4" + [(set (match_operand:SI 0 "nvptx_register_operand" "=R") + (plus:SI (plus:SI (match_operand:SI 1 "nvptx_register_operand" "R") + (match_operand:SI 2 "nvptx_register_operand" "R")) + (match_operand:SI 3 "nvptx_register_operand" "R")))] + "" + "%.\\tvadd%t0%t1%t2.add\\t%0, %1, %2, %3;") + +(define_insn "vsub_addsi4" + [(set (match_operand:SI 0 "nvptx_register_operand" "=R") + (plus:SI (minus:SI (match_operand:SI 1 "nvptx_register_operand" "R") + (match_operand:SI 2 "nvptx_register_operand" "R")) + (match_operand:SI 3 "nvptx_register_operand" "R")))] + "" + "%.\\tvsub%t0%t1%t2.add\\t%0, %1, %2, %3;") + (define_insn "sub3" [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R") (minus:HSDIM (match_operand:HSDIM 1 "nvptx_register_operand" "R") diff --git a/gcc/testsuite/gcc.target/nvptx/vadd_add.c b/gcc/testsuite/gcc.target/nvptx/vadd_add.c new file mode 100644 index 0000000..dcb2394 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/vadd_add.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int foo(int x, int y, int z) +{ + return x + y + z; +} + +unsigned int bar(unsigned int x, unsigned int y, unsigned int z) +{ + return x + y + z; +} + +/* { dg-final { scan-assembler-times "vadd.u32.u32.u32.add" 2 } } */ + diff --git a/gcc/testsuite/gcc.target/nvptx/vsub_add.c b/gcc/testsuite/gcc.target/nvptx/vsub_add.c new file mode 100644 index 0000000..3f632c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/vsub_add.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int foo(int x, int y, int z) +{ + return (x - y) + z; +} + +int bar(int x, int y, int z) +{ + return x + (y - z); +} + +unsigned int ufoo(unsigned int x, unsigned int y, unsigned int z) +{ + return (x - y) + z; +} + +unsigned int ubar(unsigned int x, unsigned int y, unsigned int z) +{ + return x + (y - z); +} + +/* { dg-final { scan-assembler-times "vsub.u32.u32.u32.add" 4 } } */ +