From patchwork Fri Nov 21 04:47:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 412948 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D69BC140187 for ; Fri, 21 Nov 2014 15:47:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=Nzg/KXIBaJsaiFDA 1satNo7ZjRAU6U7GPXeDbocH5a6KWidA5NmMtIEm1ZT+9q16Q9tScqFr157WlLVG ib5atB2g3KdtzHIqnO9UAoS3yOyIenCyx/mIekuTTieu9JfQ1TInvNidiX704TTY k/jjBpkT6nJ3AcGcCph8Ad+UrF8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=gUBvah7wJhIlnee4D5bPvR y6uqg=; b=rJ4nFkXyJ4OOHF3pDTQVTlyKkYxfSD23G9st/yxAm3F/Tms5f/xa3T 7Zb+kbo3srss9jAajOC3U182cvytIazUTC+hfSorcPJxvakgdEFziHidXacyMVeu JCAhmC4fLv3H5Aj4ZF1wU8H02oNaMJnUxg8pYCTPhqokB2Yv4uPKA= Received: (qmail 31501 invoked by alias); 21 Nov 2014 04:47:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 31488 invoked by uid 89); 21 Nov 2014 04:47:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 21 Nov 2014 04:47:19 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 21 Nov 2014 04:47:17 +0000 Received: from shawin003 ([10.164.2.24]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 21 Nov 2014 04:47:16 +0000 From: "Zhenqiang Chen" To: Subject: [PATCH, combine] Try REG_EQUAL for nonzero_bits Date: Fri, 21 Nov 2014 12:47:04 +0800 Message-ID: <000001d00546$33445430$99ccfc90$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114112104471700201 X-IsSubscribed: yes Hi, The patch tries to use REG_EQUAL to get more precise info for nonzero_bits, which helps to remove unnecessary zero_extend. Here is an example when compiling Coremark, we have rtx like, (insn 1244 386 388 47 (set (reg:SI 263 [ D.5767 ]) (reg:SI 384 [ D.5767 ])) 786 {*thumb2_movsi_insn} (expr_list:REG_EQUAL (zero_extend:SI (mem:QI (reg/v/f:SI 271 [ memblock ]) [0 *memblock_13(D)+0 S1 A8])) (nil))) from "reg:SI 384", we can only know it is a 32-bit value. But from REG_EQUAL, we can know it is an 8-bit value. Then for the following rtx seq, (insn 409 407 410 50 (set (reg:SI 308) (plus:SI (reg:SI 263 [ D.5767 ]) (const_int -48 [0xffffffffffffffd0]))) core_state.c:170 4 {*arm_addsi3} (nil)) (insn 410 409 411 50 (set (reg:SI 309) (zero_extend:SI (subreg:QI (reg:SI 308) 0))) core_state.c:170 812 {thumb2_zero_extendqisi2_v6} (expr_list:REG_DEAD (reg:SI 308) (nil))) the zero_extend for r309 can be optimized by combine pass. Bootstrap and no make check regression on X86-64. No make check regression on Cortex-M4 qemu. No Spec2K INT regression on X86-64 and Cortex-A15 with -O3. Coremark on Cortex-M7 is 0.3% better. Coremark on Cortex-M4 is 0.07% regression due to alignment change. No Coremark change on Corter-M0 and Cortex-A15. Unfortunately I failed to generate a meaningful small case for it. So no test case is included in the patch. Ok for trunk? Thanks! -Zhenqiang ChangeLog: 2014-11-21 Zhenqiang Chen * combine.c (set_nonzero_bits_and_sign_copies): Try REG_EQUAL note. if (rsp->sign_bit_copies == 0 || rsp->sign_bit_copies > num) diff --git a/gcc/combine.c b/gcc/combine.c index 6a7d16b..68a883b 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1713,7 +1713,15 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data) /* Don't call nonzero_bits if it cannot change anything. */ if (rsp->nonzero_bits != ~(unsigned HOST_WIDE_INT) 0) - rsp->nonzero_bits |= nonzero_bits (src, nonzero_bits_mode); + { + rtx reg_equal = insn ? find_reg_note (insn, REG_EQUAL, NULL_RTX) + : NULL_RTX; + if (reg_equal) + rsp->nonzero_bits |= nonzero_bits (XEXP (reg_equal, 0), + nonzero_bits_mode); + else + rsp->nonzero_bits |= nonzero_bits (src, nonzero_bits_mode); + } num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));