From patchwork Thu Nov 13 07:49:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 410299 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49BC31400D2 for ; Thu, 13 Nov 2014 18:49:38 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=kJ4oM5Q8bEsnwA+oJLT8eSnKXdsjwNhqcaSdzmKttvCQy+zEBzXUR TYd1tbcL/8Uqtte7X5rP20w+3WZtp+Sm5fH8lSnTXZp8/R+Gx3bETUDIbnuHJvx2 KKu1VnKe3G2XQ1nqYCZwh/9ei3JqWePkFqFYsdZukagJOFpe/epems= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type:content-transfer-encoding; s=default; bh=WcV4XwKRLrVkLfENp0IwPQxuz7Y=; b=G2TUEKX/xN5g968XWTHePrLl9KMf 29knarbKVSXxtzDf77lBobTNKRamDcVxr7JdvEZl8Ji88UWxGmBcyn7FSz1gtrdL 0U9y+Phb3a02Gxml3lJI7GcrFvWuPvIwM+Wigeh9i7MPOZ1KStm6Vg1ypLecJfUC BmZph+yh4ZN2iJ0= Received: (qmail 6737 invoked by alias); 13 Nov 2014 07:49:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6726 invoked by uid 89); 13 Nov 2014 07:49:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 13 Nov 2014 07:49:27 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 13 Nov 2014 07:49:25 +0000 Received: from shawin003 ([10.164.2.33]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 13 Nov 2014 07:49:24 +0000 From: "Zhenqiang Chen" To: "'Richard Henderson'" Cc: "'Jan-Benedict Glaw'" , "Hartmut Penner" , "Ulrich Weigand" , "Andreas Krebbel" , References: <000001cff995$8d9b4400$a8d1cc00$@arm.com> <545B2FCE.6040606@redhat.com> In-Reply-To: <545B2FCE.6040606@redhat.com> Subject: RE: [PATCH, ifcvt] Allow CC mode if HAVE_cbranchcc4 (fix s390 build) Date: Thu, 13 Nov 2014 15:49:09 +0800 Message-ID: <000001cfff16$50906f00$f1b14d00$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114111307492501301 X-IsSubscribed: yes > -----Original Message----- > From: Richard Henderson [mailto:rth@redhat.com] > Sent: Thursday, November 06, 2014 4:23 PM > To: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Ulrich Weigand; > Andreas Krebbel > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH, ifcvt] Allow CC mode if HAVE_cbranchcc4 (fix s390 build) > > On 11/06/2014 08:44 AM, Zhenqiang Chen wrote: > > Hi, > > > > The patch add runtime check to fix s390 build fail > > (https://gcc.gnu.org/ml/gcc-patches/2014-11/msg00050.html). > > > > And there is additional code to workaround s390 cstorecc4 issue. > > > > Bootstrap and no make check regression on X86-64. > > Build s390-linux-gnu and s390x-linux-gnu. > > > > I do not have env to run full s390 tests. Would anyone in the TO list > > help to run the s390 tests? > > > > Thanks! > > -Zhenqiang > > > > ChangeLog: > > 2014-11-06 Zhenqiang Chen > > > > * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, > > noce_get_condition): > > Allow CC mode if HAVE_cbranchcc4. > > (noce_emit_store_flag): Change CC REG as cond_complex. > > > > diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index f4002f9..7f7b7c1 100644 > > --- a/gcc/ifcvt.c > > +++ b/gcc/ifcvt.c > > @@ -849,7 +849,10 @@ noce_emit_store_flag (struct noce_if_info > > *if_info, rtx x, int reversep, > > enum rtx_code code; > > > > cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode) > > - || ! general_operand (XEXP (cond, 1), VOIDmode)); > > + || ! general_operand (XEXP (cond, 1), VOIDmode) > > + /* For s390, CC REG is general_operand. But cstorecc4 > > only > > + handles CCZ1, which can not handle others like CCU. > > */ > > + || GET_MODE_CLASS (GET_MODE (XEXP (cond, 0))) == > MODE_CC); > > > > I'd like to know more about this. This seems like a mistake in the backend. > > > +#ifdef HAVE_cbranchcc4 > > + if (GET_MODE_CLASS (GET_MODE (cmp_a)) != MODE_CC > > + || cmp_b != const0_rtx > > + || !(HAVE_cbranchcc4)) > > +#endif > > Please add > > #ifndef HAVE_cbranchcc4 > # define HAVE_cbranchcc4 > #endif > > at the top of ifcvt.c along with all of the others. Then use normal C tests > instead of preprocessor tests. Thanks for the comment. > > + int allow_cc_mode = false; > > +#ifdef HAVE_cbranchcc4 > > + allow_cc_mode = HAVE_cbranchcc4; > > +#endif > > E.g. this becomes > > bool allow_cc_mode = HAVE_cbranchcc4; After adding HAVE_cbranchcc4, we can just use HAVE_cbranchcc4. No need to add a local variable allow_cc_mode. Here is the updated patch. unsignedp = (code == LTU || code == GEU @@ -1909,7 +1919,7 @@ noce_get_alt_condition (struct noce_if_info *if_info, rtx target, } cond = canonicalize_condition (if_info->jump, cond, reverse, - earliest, target, false, true); + earliest, target, HAVE_cbranchcc4, true); if (! cond || ! reg_mentioned_p (target, cond)) return NULL; @@ -2401,7 +2411,7 @@ noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed /* Otherwise, fall back on canonicalize_condition to do the dirty work of manipulating MODE_CC values and COMPARE rtx codes. */ tmp = canonicalize_condition (jump, cond, reverse, earliest, - NULL_RTX, false, true); + NULL_RTX, HAVE_cbranchcc4, true); /* We don't handle side-effects in the condition, like handling REG_INC notes and making sure no duplicate conditions are emitted. */ diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index f4002f9..21f08c2 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -75,6 +75,10 @@ + 1) #endif +#ifndef HAVE_cbranchcc4 +#define HAVE_cbranchcc4 0 +#endif + #define IFCVT_MULTIPLE_DUMPS 1 #define NULL_BLOCK ((basic_block) NULL) @@ -1459,10 +1463,16 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code, end_sequence (); } - /* Don't even try if the comparison operands are weird. */ + /* Don't even try if the comparison operands are weird + except that the target supports cbranchcc4. */ if (! general_operand (cmp_a, GET_MODE (cmp_a)) || ! general_operand (cmp_b, GET_MODE (cmp_b))) - return NULL_RTX; + { + if (!(HAVE_cbranchcc4) + || GET_MODE_CLASS (GET_MODE (cmp_a)) != MODE_CC + || cmp_b != const0_rtx) + return NULL_RTX; + } #if HAVE_conditional_move