From patchwork Wed Sep 10 05:30:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 387549 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D23811400AB for ; Wed, 10 Sep 2014 15:30:33 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=tAOGW8CQGmaCGlze MO9pfNoYK2W8llVlc/6fmNWmyHVFo0Ukd9A5JupOXXoSnrO9goYOR7HwYF7secg9 +ywRX12ZkAQsWR/HSsem+zsphIvd2rZGlJXdLiTd96jNkP3RASSwM1dPjxgwIDT/ QyuKPfV+AbmZe1Gy2PzCY5hX1yc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=ud971MZ4ZanPdx6j05/yqp hMj6Q=; b=pv7L8Z7yenmjfIz/DVgybdoNRiQeQy0QrKXMHJxiUwtSVlmld+Z9i2 0sS1Pk+zg2/w5+EodR9hsQ2hh7hmJhE6frk8lyzgugo93dDy6/9GyYmb3KVYuKqP 6C9fhKUo3gu+LHwqTOHEWrvlJG6s9UxwWmdPybXRp+RgefHXV80Vs= Received: (qmail 2111 invoked by alias); 10 Sep 2014 05:30:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 2099 invoked by uid 89); 10 Sep 2014 05:30:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 10 Sep 2014 05:30:22 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 10 Sep 2014 06:30:20 +0100 Received: from shawin003 ([10.164.2.46]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 10 Sep 2014 06:30:20 +0100 From: "Zhenqiang Chen" To: Cc: "Ramana Radhakrishnan" , "Richard Earnshaw" Subject: [PATCH, ARM] Tune thumb1_size_rtx_costs Date: Wed, 10 Sep 2014 13:30:06 +0800 Message-ID: <000001cfccb8$48f1ab00$dad50100$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114091006302002501 X-IsSubscribed: yes Hi, Currently most thumb1_size_rtx_costs are "guessed" from performance view, not size. The patch adjusts some of them according the instruction patterns defined in thumb1.md. It also replaces several hard coded "4" to COSTS_N_INSNS (1). No make check regression for Cortex-M0 on qemu. For Cortex-M0 text code size, it reduces 0.15% for CSiBE, 0.59% for coremark, 0.13% for dhrystone, 0.14% for eembc_v1 and 0.31% for eembc-v2. OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-09-10 Zhenqiang Chen * config/arm/arm.c: #include "tm-constrs.h" (thumb1_size_rtx_costs): Adjust rtx costs. case CONST_INT: if (outer == SET) @@ -8943,16 +8946,14 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) case AND: case XOR: case IOR: - /* XXX guess. */ - return 8; + return COSTS_N_INSNS (1); case MEM: - /* XXX another guess. */ - /* Memory costs quite a lot for the first word, but subsequent words - load at the equivalent of a single insn each. */ - return (10 + 4 * ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD) + return (COSTS_N_INSNS (1) + + COSTS_N_INSNS (1) + * ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD) + ((GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x)) - ? 4 : 0)); + ? COSTS_N_INSNS (1) : 0)); case IF_THEN_ELSE: /* XXX a guess. */ diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 11e0655..a19e15c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -62,6 +62,7 @@ #include "dumpfile.h" #include "gimple-expr.h" #include "builtins.h" +#include "tm-constrs.h" /* Forward definitions of types. */ typedef struct minipool_node Mnode; @@ -8888,9 +8889,11 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) /* A SET doesn't have a mode, so let's look at the SET_DEST to get the mode. */ words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x)))); - return (COSTS_N_INSNS (words) - + 4 * ((MEM_P (SET_SRC (x))) - + MEM_P (SET_DEST (x)))); + return COSTS_N_INSNS (words) + + COSTS_N_INSNS (1) * (satisfies_constraint_J (SET_SRC (x)) + || satisfies_constraint_K (SET_SRC (x)) + /* thumb1_movdi_insn. */ + || ((words > 1) && MEM_P (SET_SRC (x))));