From patchwork Tue Feb 25 09:34:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 323885 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B77E72C00CB for ; Tue, 25 Feb 2014 20:35:10 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=EEHyt8XcmrKjlosS QSv3wiCrDGLsxEfAr4/IACwoKEh5nZoPIuM7rJ1TCIEtkD2JN5c2j/liYRJZyvVC 8XZ6OmyWnluRuSTa49qSx2ev/ikzgsgdByhXqK0tmoMrABDXYvL/9t0rBoy+eYk1 wLJs6GbfeBHCxzuQbVL8/zwfWGA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=zzX2Fke63xq35YtOxeEVsa Oe70Y=; b=SQih6HaKnlqtAf5lejd09bOqVMZc6NYJ1J/xug7Qy2eJ46vsYSQOwy kSvj1Wtt9UqR0zYO187s+BoMTZXxo9pZIfauZpKD0KntDf4BVAXlDxeFvmCoLb7r XQtkInlp0HO1O/YXkhPGvcFM80qXPzfPZjz1xdKdLXsRVDna24fI0= Received: (qmail 13817 invoked by alias); 25 Feb 2014 09:35:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 13807 invoked by uid 89); 25 Feb 2014 09:35:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 25 Feb 2014 09:35:01 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 25 Feb 2014 09:34:58 +0000 Received: from shawin003 ([10.164.2.36]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 25 Feb 2014 09:34:55 +0000 From: "Zhenqiang Chen" To: Cc: "Ramana Radhakrishnan" Subject: [PATCH, ARM] Set max_insns_skipped to MAX_INSN_PER_IT_BLOCK when optimize_size for THUMB2 Date: Tue, 25 Feb 2014 17:34:40 +0800 Message-ID: <000001cf320c$cfdc4770$6f94d650$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114022509345802301 X-IsSubscribed: yes Hi, Current value for max_insns_skipped is 6. For THUMB2, it needs 2 (IF-THEN) or 3 (IF-THEN-ELSE) IT blocks to hold all the instructions. The overhead of IT is 4 or 6 BYTES. If we do not generate IT blocks, for IF-THEN, the overhead of conditional jump is 2 or 4; for IF-THEN-ELSE, the overhead is 4, 6, or 8. Most THUMB2 jump instructions are 2 BYTES. Tests on CSiBE show no one file has code size regression. So The patch sets max_insns_skipped to MAX_INSN_PER_IT_BLOCK. No make check regression on cortex-m3. For CSiBE, no any file has code size regression. And overall there is >0.01% code size improvement for cortex-a9 and cortex-m4. Is it OK? Thanks! -Zhenqiang 2014-02-25 Zhenqiang Chen * config/arm/arm.c (arm_option_override): Set max_insns_skipped to MAX_INSN_PER_IT_BLOCK when optimize_size for THUMB2. testsuite/ChangeLog: 2014-02-25 Zhenqiang Chen * gcc.target/arm/max-insns-skipped.c: New test. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b49f43e..99cdbc4 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2743,6 +2743,15 @@ arm_option_override (void) /* If optimizing for size, bump the number of instructions that we are prepared to conditionally execute (even on a StrongARM). */ max_insns_skipped = 6; + + /* For THUMB2, it needs 2 (IF-THEN) or 3 (IF-THEN-ELSE) IT blocks to + hold all the instructions. The overhead of IT is 4 or 6 BYTES. + If we do not generate IT blocks, for IF-THEN, the overhead of + conditional jump is 2 or 4; for IF-THEN-ELSE, the overhead is 4, 6 + or 8. Most THUMB2 jump instructions are 2 BYTES. + So set max_insns_skipped to MAX_INSN_PER_IT_BLOCK. */ + if (TARGET_THUMB2) + max_insns_skipped = MAX_INSN_PER_IT_BLOCK; } else max_insns_skipped = current_tune->max_insns_skipped; diff --git a/gcc/testsuite/gcc.target/arm/max-insns-skipped.c b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c new file mode 100644 index 0000000..0a11554 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c @@ -0,0 +1,21 @@ +/* { dg-do assemble { target arm_thumb2 } } */ +/* { dg-options " -Os " } */ + +int t (int a, int b, int c, int d) +{ + int r; + if (a > 0) { + r = a + b; + r += 0x456; + r *= 0x1234567; + } + else { + r = b - a; + r -= 0x123; + r *= 0x12387; + r += d; + } + return r; +} + +/* { dg-final { object-size text <= 40 } } */