From patchwork Thu Nov 28 06:17:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 294769 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 95C2F2C00A9 for ; Thu, 28 Nov 2013 17:17:47 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=DIVSciNgbOEE9KT5+ultlnPxwHqz6eivUlQm3gMjCqULFEZ08YCsv LWwGvCzkXXCUbb+OtEEQsBF3FOkBY1rwzMOmQOhWil91IhSadVxYJANKj1VlqVX/ wLAJGbyL6dQinv5AVDBVgOvjlf81oo1GFg9I3TULt98SipKVzhey5g= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type:content-transfer-encoding; s=default; bh=86twrD58tVOX5DQgMdWoJ6q6074=; b=XayPwvimN8GH/ZFm8hWX9z6RAk8d NpvtzA2j3yL2OztZ2qeXP/bLxWvOR/MVRqbz1fWrBsM+sEHTCQrcyA3QI9d9txuL BnsDK1NqmqdfPM0Wqk882ZHSqyHHUNFRZjvEsh8oIJrVZGS8OHP7ZHVGJCvSnS92 MKfTu0aJ8rdAfc4= Received: (qmail 28608 invoked by alias); 28 Nov 2013 06:17:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28597 invoked by uid 89); 28 Nov 2013 06:17:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL, BAYES_50, RDNS_NONE, SPF_PASS, URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: service87.mimecast.com Received: from Unknown (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 28 Nov 2013 06:17:37 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 28 Nov 2013 06:17:28 +0000 Received: from shawin003 ([10.164.2.36]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 28 Nov 2013 06:17:25 +0000 From: "Zhenqiang Chen" To: "'Jeff Law'" , Cc: "Ramana Radhakrishnan" , "Richard Earnshaw" References: <000001ceeb4f$c221c5a0$466550e0$@arm.com> <5296210D.7020606@redhat.com> In-Reply-To: <5296210D.7020606@redhat.com> Subject: RE: [PING] [PATCH, ARM, testcase] Skip target arm-neon for lp1243022.c Date: Thu, 28 Nov 2013 14:17:06 +0800 Message-ID: <000001ceec01$77bc13a0$67343ae0$@arm.com> MIME-Version: 1.0 X-MC-Unique: 113112806172800301 X-IsSubscribed: yes > -----Original Message----- > From: Jeff Law [mailto:law@redhat.com] > Sent: Thursday, November 28, 2013 12:43 AM > To: Zhenqiang Chen; gcc-patches@gcc.gnu.org > Cc: Ramana Radhakrishnan; Richard Earnshaw > Subject: Re: [PING] [PATCH, ARM, testcase] Skip target arm-neon for > lp1243022.c > > On 11/27/13 02:05, Zhenqiang Chen wrote: > > Ping? > Thanks for including the actual patch you're pinging, it helps :-) > > >>> Hi, > >> > >> lp1243022.c will fail with options: -mfpu=neon -mfloat-abi=hard. > >> > >> Logs show it does not generate auto-incremental instruction in pass > >> auto_inc_dec. In this case, the check of REG_INC note at subreg2 will > >> be invalid. So skip the check for target arm-neon. > >> > >> All PASS with the following options: > >> > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=hard > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=soft > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=softfp > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=soft/-mfpu=vfpv3 > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=softfp/-mfpu=vfpv3 > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=hard/-mfpu=vfpv3 > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=soft/-mfpu=neon > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=softfp/-mfpu=neon > >> -mthumb/-mcpu=cortex-a9/-mfloat-abi=hard/-mfpu=neon > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=hard > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=soft > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=softfp > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=soft/-mfpu=vfpv4 > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=softfp/-mfpu=vfpv4 > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=hard/-mfpu=vfpv4 > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=soft/-mfpu=neon > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=softfp/-mfpu=neon > >> -mthumb/-mcpu=cortex-a15/-mfloat-abi=hard/-mfpu=neon > >> > >> Is it OK? > >> > >> Thanks! > >> -Zhenqiang > >> > >> testsuite/ChangeLog: > >> 2013-11-08 Zhenqiang Chen > >> > >> * gcc.target/arm/lp1243022.c: Skip target arm-neon. > It seems to me you should be xfailing arm-neon, not skipping the test. > Unless there is some fundamental reason why we can not generate auto-inc > instructions on the neon. Thanks for the comments. Update the test case as xfail. diff --git a/gcc/testsuite/gcc.target/arm/lp1243022.c b/gcc/testsuite/gcc.target/arm/lp1243022.c index 91a544d..b2ebe7e 100644 --- a/gcc/testsuite/gcc.target/arm/lp1243022.c +++ b/gcc/testsuite/gcc.target/arm/lp1243022.c @@ -1,7 +1,7 @@ /* { dg-do compile { target arm_thumb2 } } */ /* { dg-options "-O2 -fdump-rtl-subreg2" } */ -/* { dg-final { scan-rtl-dump "REG_INC" "subreg2" } } */ +/* { dg-final { scan-rtl-dump "REG_INC" "subreg2" { xfail arm_neon } } } */ /* { dg-final { cleanup-rtl-dump "subreg2" } } */ struct device; typedef unsigned int __u32;