Show patches with: Submitter = liuhongt       |    State = Action Required       |   630 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
Fix ICE due to subreg:us_truncate. Fix ICE due to subreg:us_truncate. - - - - --- 2024-10-30 liuhongt New
[2/2] Support vector float_extend from __bf16 to float. [1/2,x86] Support vector float_truncate for SF to BF. - - - - --- 2024-10-30 liuhongt New
[1/2,x86] Support vector float_truncate for SF to BF. [1/2,x86] Support vector float_truncate for SF to BF. - - - - --- 2024-10-30 liuhongt New
[x86] Fix ICE due to isa mismatch for the builtins. [x86] Fix ICE due to isa mismatch for the builtins. - - - - --- 2024-10-23 liuhongt New
[GCC13/GCC12] Fix testcase. [GCC13/GCC12] Fix testcase. - - - - --- 2024-10-22 liuhongt New
i386: Optimize EQ/NE comparison between avx512 kmask and -1. i386: Optimize EQ/NE comparison between avx512 kmask and -1. - - - - --- 2024-10-22 liuhongt New
[AVX512] Refine splitters related to "combine vpcmpuw + zero_extend to vpcmpuw" [AVX512] Refine splitters related to "combine vpcmpuw + zero_extend to vpcmpuw" - - - - --- 2024-10-17 liuhongt New
Adjust testcase to avoid scan FIX in REG_EQUIV. Adjust testcase to avoid scan FIX in REG_EQUIV. - - - - --- 2024-10-15 liuhongt New
[wwwdoc] Mention O2 vectorization enhancement. [wwwdoc] Mention O2 vectorization enhancement. - - - - --- 2024-10-15 liuhongt New
[2/2,x86] Canonicalize (vec_merge (fma: op2 op1 op3) (match_dup 1)) mask) to (vec_merge (fma: op1 o… Canonicalize (vec_merge (fma op1 op2 op3) op1 mask) to (vec_merge (fma op1 op2 op3) op1 mask) - - - - --- 2024-10-15 liuhongt New
[1/2,Middle-end] Canonicalize (vec_merge (fma op2 op1 op3) op1 mask) to (vec_merge (fma op1 op2 op3… Canonicalize (vec_merge (fma op1 op2 op3) op1 mask) to (vec_merge (fma op1 op2 op3) op1 mask) - - - - --- 2024-10-15 liuhongt New
[v3,2/2] Adjust testcase after relax O2 vectorization. [v3,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… - - - - --- 2024-10-09 liuhongt New
[v3,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… [v3,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… - - - - --- 2024-10-09 liuhongt New
Don't lower vpcmpu to pcmpgt since the latter is for signed comparison. Don't lower vpcmpu to pcmpgt since the latter is for signed comparison. - - - - --- 2024-10-09 liuhongt New
[2/2,x86] Add a new tune avx256_avoid_vec_perm for SRF. Enable more SRF tuning - - - - --- 2024-10-08 liuhongt New
[1/2,x86] Add new microarchitecture tune for SRF/GRR/CWF. Enable more SRF tuning - - - - --- 2024-10-08 liuhongt New
[v2,2/2] Adjust testcase after relax O2 vectorization. [v2,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… - - - - --- 2024-10-08 liuhongt New
[v2,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… [v2,1/2] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vec… - - - - --- 2024-10-08 liuhongt New
[x86] Define VECTOR_STORE_FLAG_VALUE [x86] Define VECTOR_STORE_FLAG_VALUE - - - - --- 2024-09-24 liuhongt New
[RFC] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vector… [RFC] Enable vectorization for unknown tripcount in very cheap cost model but disable epilog vector… - - - - --- 2024-09-11 liuhongt New
Enable tune fuse_move_and_alu for GNR/GNR-D. Enable tune fuse_move_and_alu for GNR/GNR-D. - - - - --- 2024-09-10 liuhongt New
Don't force_reg operands[3] when it's not const0_rtx. Don't force_reg operands[3] when it's not const0_rtx. - - - - --- 2024-09-09 liuhongt New
Handle const0_operand for *avx2_pcmp<mode>3_1. Handle const0_operand for *avx2_pcmp<mode>3_1. - - - - --- 2024-09-05 liuhongt New
[x86] Check avx upper register for parallel. [x86] Check avx upper register for parallel. - - - - --- 2024-08-30 liuhongt New
[x86] Check avx upper register for parallel. [x86] Check avx upper register for parallel. - - - - --- 2024-08-29 liuhongt New
[v2,2/2,x86] Update ix86_mode_tieable_p and ix86_rtx_costs. - - - - --- 2024-08-27 liuhongt New
[v2,1/2] Enhance cse_insn to handle all-zeros and all-ones for vector mode. [v2,1/2] Enhance cse_insn to handle all-zeros and all-ones for vector mode. - - - - --- 2024-08-27 liuhongt New
[2/2,x86] Update ix86_mode_tieable_p and ix86_rtx_costs. [1/2] Enhance cse_insn to handle all-zeros and all-ones for vector mode. - - - - --- 2024-08-26 liuhongt New
[1/2] Enhance cse_insn to handle all-zeros and all-ones for vector mode. [1/2] Enhance cse_insn to handle all-zeros and all-ones for vector mode. - - - - --- 2024-08-26 liuhongt New
[GCC13/GCC12] Fix testcase failure. [GCC13/GCC12] Fix testcase failure. - - - - --- 2024-08-22 liuhongt New
Align ix86_{move_max,store_max} with vectorizer. Align ix86_{move_max,store_max} with vectorizer. - - - - --- 2024-08-21 liuhongt New
Align predicates for operands[1] between mov<mode> and *mov<mode>_internal. Align predicates for operands[1] between mov<mode> and *mov<mode>_internal. - - - - --- 2024-08-20 liuhongt New
[v2,x86] Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary reload. [v2,x86] Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary reload. - - - - --- 2024-08-15 liuhongt New
[x86] Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary reload. [x86] Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary reload. - - - - --- 2024-08-14 liuhongt New
Move ix86_align_loops into a separate pass and insert the pass after pass_endbr_and_patchable_area. Move ix86_align_loops into a separate pass and insert the pass after pass_endbr_and_patchable_area. - - - - --- 2024-08-12 liuhongt New
[x86] Mention _Float16 and __bf16 changes in GCC14. [x86] Mention _Float16 and __bf16 changes in GCC14. - - - - --- 2024-07-31 liuhongt New
Fix mismatch between constraint and predicate for ashl<mode>3_doubleword. Fix mismatch between constraint and predicate for ashl<mode>3_doubleword. - - - - --- 2024-07-30 liuhongt New
Fix mismatch between constraint and predicate for ashl<mode>3_doubleword. Fix mismatch between constraint and predicate for ashl<mode>3_doubleword. - - - - --- 2024-07-26 liuhongt New
[x86] Refine constraint "Bk" to define_special_memory_constraint. [x86] Refine constraint "Bk" to define_special_memory_constraint. - - - - --- 2024-07-24 liuhongt New
Relax ix86_hardreg_mov_ok after split1. Relax ix86_hardreg_mov_ok after split1. - - - - --- 2024-07-23 liuhongt New
[v2,x86,avx512] Optimize maskstore when mask is 0 or -1 in UNSPEC_MASKMOV [v2,x86,avx512] Optimize maskstore when mask is 0 or -1 in UNSPEC_MASKMOV - - - - --- 2024-07-18 liuhongt New
[x86,avx512] Optimize maskstore when mask is 0 or -1 in UNSPEC_MASKMOV [x86,avx512] Optimize maskstore when mask is 0 or -1 in UNSPEC_MASKMOV - - - - --- 2024-07-17 liuhongt New
Fix SSA_NAME leak due to def_stmt is removed before use_stmt. Fix SSA_NAME leak due to def_stmt is removed before use_stmt. - - - - --- 2024-07-12 liuhongt New
Rename __{float, double}_u to __x86_{float, double}_u to avoid pulluting the namespace. Rename __{float, double}_u to __x86_{float, double}_u to avoid pulluting the namespace. - - - - --- 2024-07-08 liuhongt New
[committed] Use __builtin_cpu_support instead of __get_cpuid_count. [committed] Use __builtin_cpu_support instead of __get_cpuid_count. - - - - --- 2024-07-04 liuhongt New
[V2] x86: Update branch hint for Redwood Cove. [V2] x86: Update branch hint for Redwood Cove. - - - - --- 2024-07-04 liuhongt New
[committed] Move runtime check into a separate function and guard it with target ("no-avx") [committed] Move runtime check into a separate function and guard it with target ("no-avx") - - - - --- 2024-07-03 liuhongt New
x86: Update branch hint for Redwood Cove. x86: Update branch hint for Redwood Cove. - - - - --- 2024-07-02 liuhongt New
[3/3,x86] Enable flate-combine. Enable pass_late_combine for x86. - - - - --- 2024-06-28 liuhongt New
[2/3] Extend lshifrtsi3_1_zext to ?k alternative. Enable pass_late_combine for x86. - - - - --- 2024-06-28 liuhongt New
[1/3,avx512,testsuite] Define mask as extern instead of uninitialized local variables. Enable pass_late_combine for x86. - - - - --- 2024-06-28 liuhongt New
Fix native_encode_vector_part for itype when TYPE_PRECISION (itype) == BITS_PER_UNIT Fix native_encode_vector_part for itype when TYPE_PRECISION (itype) == BITS_PER_UNIT - - - - --- 2024-06-28 liuhongt New
[7/7] Remove vcond{, u, eq}<mode> expanders since they will be obsolete. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[6/7,x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[5/7] Adjust testcase for the regressed testcases after obsolete of vcond{, u, eq}. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[4/7] Add more splitter for mskmov with avx512 comparison. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[3/7,x86] Match IEEE min/max with UNSPEC_IEEE_{MIN,MAX}. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[2/7] Lower AVX512 kmask comparison back to AVX2 comparison when op_{true, false} is vector -1/0. Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[1/7,x86] Add more splitters to match (unspec [op1 op2 (gt op3 constm1_operand)] UNSPEC_BLENDV) Remove vcond{,u,eq}<mode> expanders. - - - - --- 2024-06-27 liuhongt New
[V2] Fix wrong cost of MEM when addr is a lea. [V2] Fix wrong cost of MEM when addr is a lea. - - - - --- 2024-06-27 liuhongt New
Fix wrong cost of MEM when addr is a lea. Fix wrong cost of MEM when addr is a lea. - - - - --- 2024-06-26 liuhongt New
[V3,Committed,x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. [V3,Committed,x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. - - - - --- 2024-06-26 liuhongt New
[V2,x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. [V2,x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. - - - - --- 2024-06-23 liuhongt New
[match.pd] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. [match.pd] Optimize a < 0 ? -1 : 0 to (signed)a >> 31. - - - - --- 2024-06-21 liuhongt New
Remove one_if_conv for latest Intel processors and Generic. Remove one_if_conv for latest Intel processors and Generic. - - - - --- 2024-06-13 liuhongt New
[Committed] Fix ICE due to REGNO of a SUBREG. [Committed] Fix ICE due to REGNO of a SUBREG. - - - - --- 2024-06-13 liuhongt New
Adjust ix86_rtx_costs for pternlog_operand_p. Adjust ix86_rtx_costs for pternlog_operand_p. - - - - --- 2024-06-13 liuhongt New
[V2] Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P [V2] Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P - - - - --- 2024-06-11 liuhongt New
Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P - - - - --- 2024-06-11 liuhongt New
[committed] Add additional option --param max-completely-peeled-insns=200 for power64*-*-* [committed] Add additional option --param max-completely-peeled-insns=200 for power64*-*-* - - - - --- 2024-06-07 liuhongt New
[Committed] Refine testcase for power10. [Committed] Refine testcase for power10. - - - - --- 2024-06-06 liuhongt New
[V2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode. [V2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode. - - - - --- 2024-06-05 liuhongt New
[x86] Adjust testcase for -march=cascadelake [x86] Adjust testcase for -march=cascadelake - - - - --- 2024-06-04 liuhongt New
[x86] Add some preference for floating point rtl ifcvt when sse4.1 is not available [x86] Add some preference for floating point rtl ifcvt when sse4.1 is not available - - - - --- 2024-06-03 liuhongt New
[committed,x86] Rename double_u with __double_u to avoid pulluting the namespace. [committed,x86] Rename double_u with __double_u to avoid pulluting the namespace. - - - - --- 2024-05-31 liuhongt New
[x86] Support vcond_mask_qiqi and friends. [x86] Support vcond_mask_qiqi and friends. - - - - --- 2024-05-29 liuhongt New
[V2] Reduce cost of MEM (A + imm). [V2] Reduce cost of MEM (A + imm). - - - - --- 2024-05-28 liuhongt New
[committed,avx512] Fix predicate mismatch between vfcmaddcph's define_insn and define_expand. [committed,avx512] Fix predicate mismatch between vfcmaddcph's define_insn and define_expand. - - - - --- 2024-05-28 liuhongt New
Reduce cost of MEM (A + imm). Reduce cost of MEM (A + imm). - - - - --- 2024-05-28 liuhongt New
Don't simplify NAN/INF or out-of-range constant for FIX/UNSIGNED_FIX. Don't simplify NAN/INF or out-of-range constant for FIX/UNSIGNED_FIX. - - - - --- 2024-05-27 liuhongt New
Fix typo in the testcase. Fix typo in the testcase. - - - - --- 2024-05-24 liuhongt New
[V3] Don't reduce estimated unrolled size for innermost loop. [V3] Don't reduce estimated unrolled size for innermost loop. - - - - --- 2024-05-24 liuhongt New
[V2] Don't reduce estimated unrolled size for innermost loop at cunrolli. [V2] Don't reduce estimated unrolled size for innermost loop at cunrolli. - - - - --- 2024-05-22 liuhongt New
Don't simplify NAN/INF or out-of-range constant for FIX/UNSIGNED_FIX. Don't simplify NAN/INF or out-of-range constant for FIX/UNSIGNED_FIX. - - - - --- 2024-05-22 liuhongt New
[2/2,x86] Adjust rtx_cost for MEM to enable more simplication [1/2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode. - - - - --- 2024-05-21 liuhongt New
[1/2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode. [1/2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode. - - - - --- 2024-05-21 liuhongt New
Use pblendw instead of pand to clear upper 16 bits. Use pblendw instead of pand to clear upper 16 bits. - - - - --- 2024-05-17 liuhongt New
[x86] Set d.one_operand_p to true when TARGET_SSSE3 in ix86_expand_vecop_qihi_partial. [x86] Set d.one_operand_p to true when TARGET_SSSE3 in ix86_expand_vecop_qihi_partial. - - - - --- 2024-05-15 liuhongt New
[x86] Optimize ashift >> 7 to vpcmpgtb for vector int8. [x86] Optimize ashift >> 7 to vpcmpgtb for vector int8. - - - - --- 2024-05-15 liuhongt New
Don't reduce estimated unrolled size for innermost loop. Don't reduce estimated unrolled size for innermost loop. - - - - --- 2024-05-13 liuhongt New
Don't assert for IFN_COND_{MIN, MAX} in vect_transform_reduction Don't assert for IFN_COND_{MIN, MAX} in vect_transform_reduction - - - - --- 2024-04-29 liuhongt New
[x86] Optimize 64-bit vector permutation with punpcklqdq + 128-bit vector pshuf. [x86] Optimize 64-bit vector permutation with punpcklqdq + 128-bit vector pshuf. - - - - --- 2024-04-28 liuhongt New
[2/2] Extend usdot_prodv*qi with vpmaddwd when AVXVNNI/AVX512VNNI is not available. [1/2,x86] Support dot_prod optabs for 64-bit vector. - - - - --- 2024-04-28 liuhongt New
[1/2,x86] Support dot_prod optabs for 64-bit vector. [1/2,x86] Support dot_prod optabs for 64-bit vector. - - - - --- 2024-04-28 liuhongt New
Update libbid according to the latest Intel Decimal Floating-Point Math Library. Update libbid according to the latest Intel Decimal Floating-Point Math Library. - - - - --- 2024-04-28 liuhongt New
[x86] Adjust alternative *k to ?k for avx512 mask in zero_extend patterns [x86] Adjust alternative *k to ?k for avx512 mask in zero_extend patterns - - - - --- 2024-04-28 liuhongt New
[V2] sanitizer: [PR110027] Align asan_vec[0] to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZO… [V2] sanitizer: [PR110027] Align asan_vec[0] to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZO… - - - - --- 2024-03-26 liuhongt New
Move pr114396.c from gcc.target/i386 to gcc.c-torture/execute. Move pr114396.c from gcc.target/i386 to gcc.c-torture/execute. - - - - --- 2024-03-22 liuhongt New
Fix runtime error for nonlinear iv vectorization(step_mult). Fix runtime error for nonlinear iv vectorization(step_mult). - - - - --- 2024-03-21 liuhongt New
[V2] Document -fexcess-precision=16. [V2] Document -fexcess-precision=16. - - - - --- 2024-03-20 liuhongt New
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