From patchwork Fri Sep 8 01:03:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 1831171 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=epdBBfrv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RhdD439zcz1yhG for ; Fri, 8 Sep 2023 11:03:57 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 879663858D38 for ; Fri, 8 Sep 2023 01:03:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 879663858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1694135034; bh=GmvYkgKwn/hHFatfSxllc8ySeU+0DvHxhrDLpwvy6/c=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=epdBBfrvFLwiTyBobMpR6v84/4AoL8Ws5bIbpCYmqnMcICQ2zcszzoIJb3SzWfRXG Q02joJNZsUyDlDwNRYH3xCMwDo/LterYYPkFa4l20XROsZuTPvEfI/sq14AATEwwRr Ysvtg3JfdkgBFWKFTtrb4PcN9HxPpucd/rWu/k+A= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id C5BD03858D1E for ; Fri, 8 Sep 2023 01:03:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C5BD03858D1E Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id EA0C5300089; Fri, 8 Sep 2023 01:03:25 +0000 (UTC) To: Tsukasa OI , Kito Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [RFC PATCH 0/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t Date: Fri, 8 Sep 2023 01:03:12 +0000 Message-ID: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_MANYTO, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gcc-patches From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This is built on another RFC PATCH "RISC-V: Change RISC-V bit manipulation / scalar crypto builtin types" and changes SHA-256, SM3 and SM4 intrinsics operate on uint32_t, not on XLEN-bit wide integers. This is in parity with the LLVM commit 599421ae36c3 ("[RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.") by Craig Topper. Because we had to refine the base instruction definitions, it was way harder than that of LLVM. Thankfully, we have a similar example: 32-bit integer instructions on RV64 such as ADDW. Before: riscv__si: For RV32, fully operate on uint32_t riscv__di: For RV64, fully operate on uint64_t After: *riscv__si: For RV32, fully operate on uint32_t riscv__di_extended: For RV64, input is uint32_t and output is int64_t, sign-extended from the int32_t result (represents a part of behavior). riscv__si: Common (fully operate on uint32_t). On RV32, expands to *riscv__si. On RV64, initially expands to riscv__di_extended *and* extracts lower 32-bits from the int64_t result. Sincerely, Tsukasa Tsukasa OI (1): RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t gcc/config/riscv/crypto.md | 161 ++++++++++++------ gcc/config/riscv/riscv-builtins.cc | 7 +- gcc/config/riscv/riscv-ftypes.def | 1 - gcc/config/riscv/riscv-scalar-crypto.def | 24 +-- .../gcc.target/riscv/zknh-sha256-32.c | 10 ++ .../riscv/{zknh-sha256.c => zknh-sha256-64.c} | 8 +- gcc/testsuite/gcc.target/riscv/zksed64.c | 4 +- gcc/testsuite/gcc.target/riscv/zksh64.c | 4 +- 8 files changed, 139 insertions(+), 80 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zknh-sha256-32.c rename gcc/testsuite/gcc.target/riscv/{zknh-sha256.c => zknh-sha256-64.c} (78%) base-commit: daaed758517c81fc8f8bc6502be648aca51ab278 prerequisite-patch-id: 4f4a84ebc0c33ea159db4dcd70fa8894f27c638a prerequisite-patch-id: d2b85f777b042d349c5e232979ee219c8147c154