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[0/9] RISC-V: Improve const vector costing and expansion

Message ID 20240822194705.2789364-1-patrick@rivosinc.com
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Series RISC-V: Improve const vector costing and expansion | expand

Message

Patrick O'Neill Aug. 22, 2024, 7:46 p.m. UTC 
Constant vectors are currently spilled/loaded from memory often. This series
increases the number of costed patterns via a catch-all pattern and fixes a
variety of bugs I found along the way.

Patrick O'Neill (9):
  RISC-V: Use encoded nelts when calling repeating_sequence_p
  RISC-V: Fix vid const vector expander for non-npatterns size steps
  RISC-V: Handle 0.0 floating point pattern costing to match
    const_vector expander
  RISC-V: Reorder insn cost match order to match corresponding expander
    match order
  RISC-V: Handle case when constant vector construction target rtx is
    not a register
  RISC-V: Emit costs for bool and stepped const vectors
  RISC-V: Allow non-duplicate bool patterns in expand_const_vector
  RISC-V: Move helper functions above expand_const_vector
  RISC-V: Add vslide1up/down pattern to expand_const_vector

 gcc/config/riscv/riscv-v.cc                   | 343 +++++++++---------
 gcc/config/riscv/riscv-v.h                    |  88 +++++
 gcc/config/riscv/riscv.cc                     | 167 ++++++++-
 .../riscv/rvv/autovec/materialize-1.c         |  13 +
 .../riscv/rvv/autovec/materialize-2.c         |  13 +
 .../riscv/rvv/autovec/materialize-3.c         |  13 +
 .../riscv/rvv/autovec/materialize-4.c         |  13 +
 .../riscv/rvv/autovec/materialize-5.c         |  13 +
 .../riscv/rvv/autovec/materialize-6.c         |  13 +
 9 files changed, 487 insertions(+), 189 deletions(-)
 create mode 100644 gcc/config/riscv/riscv-v.h
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/materialize-6.c

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2.34.1