From patchwork Thu May 23 14:37:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1938364 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VlW4b6sbkz1ynR for ; Fri, 24 May 2024 00:38:23 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 447AF386C586 for ; Thu, 23 May 2024 14:38:21 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id AB1203858C62 for ; Thu, 23 May 2024 14:37:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AB1203858C62 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org AB1203858C62 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716475079; cv=none; b=pOoyrpY7SbyKQDl/LNLWVB9DGrKUAY/Pt/W+L0LZRVEj6QWscle2jQ3Br4Sh4eBdrxTlVl5t6j5nAxhxHIpVig5dP5CH5C8yV7zqQSSTlzBPMTixlwz7ACSyQU1CZu54b7f+PpZ3diQbDXZDeVV4jF2n1un8R2AUyqwwZVa7J9s= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716475079; c=relaxed/simple; bh=j1gaF8jNJfrpNwI6a7PeFyVaPXvx7aUEL4cNRKwAFaY=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Eo8P5iImwEVx+zIaw4jmAQIQ0veKlqlp2mv6AVWsJEXkTib+BNPoG/hsn8+bpSodOfHowHjjdYDYz0txDrnetEpXVsMulSmBLCp+PPCZ93m8WDtDmxZHb4YCEpd4WymgNKNQDDvvkkiYYbQ0i0bZ2+N4uMLjdywhrIL8CDrGuzM= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4E314339; Thu, 23 May 2024 07:38:21 -0700 (PDT) Received: from e107157-lin.cambridge.arm.com (e107157-lin.cambridge.arm.com [10.2.78.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 95F533F766; Thu, 23 May 2024 07:37:56 -0700 (PDT) From: Andre Vieira To: gcc-patches@gcc.gnu.org Cc: stam.markianos-wright@arm.com, richard.earnshaw@arm.com, Andre Vieira Subject: [PATCH 0/2] arm, doloop: Add support for MVE Tail-Predicated Low Overhead Loops Date: Thu, 23 May 2024 15:37:40 +0100 Message-Id: <20240523143742.28518-1-andre.simoesdiasvieira@arm.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Spam-Status: No, score=-6.7 required=5.0 tests=BAYES_00, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, We held these two patches back in stage 4 because they touched target-agnostic code, though I am quite confident they will not affect other targets. Given stage one has reopened, I am reposting them, I rebased them but they seem to apply cleanly on trunk. No changes from previously reviewed patches. OK for trunk? Andre Vieira (2): doloop: Add support for predicated vectorized loops arm: Add support for MVE Tail-Predicated Low Overhead Loops gcc/config/arm/arm-protos.h | 4 +- gcc/config/arm/arm.cc | 1249 ++++++++++++++++- gcc/config/arm/arm.opt | 3 + gcc/config/arm/iterators.md | 15 + gcc/config/arm/mve.md | 50 + gcc/config/arm/thumb2.md | 138 +- gcc/config/arm/types.md | 6 +- gcc/config/arm/unspecs.md | 14 +- gcc/df-core.cc | 15 + gcc/df.h | 1 + gcc/loop-doloop.cc | 164 ++- gcc/testsuite/gcc.target/arm/lob.h | 128 +- gcc/testsuite/gcc.target/arm/lob1.c | 23 +- gcc/testsuite/gcc.target/arm/lob6.c | 8 +- .../gcc.target/arm/mve/dlstp-compile-asm-1.c | 146 ++ .../gcc.target/arm/mve/dlstp-compile-asm-2.c | 749 ++++++++++ .../gcc.target/arm/mve/dlstp-compile-asm-3.c | 46 + .../gcc.target/arm/mve/dlstp-int16x8-run.c | 44 + .../gcc.target/arm/mve/dlstp-int16x8.c | 31 + .../gcc.target/arm/mve/dlstp-int32x4-run.c | 45 + .../gcc.target/arm/mve/dlstp-int32x4.c | 31 + .../gcc.target/arm/mve/dlstp-int64x2-run.c | 48 + .../gcc.target/arm/mve/dlstp-int64x2.c | 28 + .../gcc.target/arm/mve/dlstp-int8x16-run.c | 44 + .../gcc.target/arm/mve/dlstp-int8x16.c | 32 + .../gcc.target/arm/mve/dlstp-invalid-asm.c | 521 +++++++ 26 files changed, 3434 insertions(+), 149 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-3.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int16x8-run.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int16x8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int32x4-run.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int32x4.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int64x2-run.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int64x2.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int8x16-run.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int8x16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c