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X-CSE-ConnectionGUID: JNLt6guuQUS9PTpye0Rhbw== X-CSE-MsgGUID: XE59JOvHQp6CM/R/YLU5yQ== X-IronPort-AV: E=McAfee;i="6600,9927,11073"; a="11648189" X-IronPort-AV: E=Sophos;i="6.08,161,1712646000"; d="scan'208";a="11648189" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2024 01:20:56 -0700 X-CSE-ConnectionGUID: HnEYP2jPQXu9GYXNoUSbog== X-CSE-MsgGUID: ZK5PrK2KTYqaiPWExrkaIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,161,1712646000"; d="scan'208";a="35448181" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa005.fm.intel.com with ESMTP; 15 May 2024 01:20:55 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 846D31006FE4; Wed, 15 May 2024 16:20:54 +0800 (CST) From: Hongyu Wang To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com, hongtao.liu@intel.com Subject: [PATCH 0/3] Support Intel APX CCMP Date: Wed, 15 May 2024 16:20:51 +0800 Message-Id: <20240515082054.3934069-1-hongyu.wang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, KAM_SHORT, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org APX CCMP feature[1] implements conditional compare which executes compare when EFLAGS matches certain condition. CCMP introduces default flags value (dfv), when conditional compare does not execute, it will directly set the flags according to dfv. From APX assembler recommendation document, the instruction is like ccmpeq {dfv=sf,of,cf,zf} %rax, %r16 For this instruction, it will test EFLAGS regs if it matches conditional code EQ, if yes, compare %rax and %r16 like legacy cmp. If no, the EFLAGS will be updated according to dfv, which means SF,OF,CF,ZF are set. PF will be set according to CF in dfv, and AF will always be cleared. The dfv part can be a combination of sf,of,cf,zf, like {dfv=cf,zf} which sets CF and ZF only and clear others, or {dfv=} which clears all EFLAGS. To enable CCMP, we implemented the target hook TARGET_GEN_CCMP_FIRST and TARGET_GEN_CCMP_NEXT to reuse the current ccmp infrastructure. Also we extended the cstorem4 optab to support storing different CCmode to fit current ccmp infrasturcture. We also adjusted the middle-end ccmp strategy to support fp comi + int ccmp generation. All the changes passed bootstrap & regtest on {aarch64/x86-64}-pc-linux-gnu. We also tested spec with sde and passed the runtime test. Ok for trunk? [1].https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Hongyu Wang (3): [APX CCMP] Support APX CCMP [APX CCMP] Adjust startegy for selecting ccmp candidates [APX CCMP] Support ccmp for float compare gcc/ccmp.cc | 12 +- gcc/config/i386/i386-expand.cc | 164 +++++++++++++++++++++ gcc/config/i386/i386-opts.h | 6 +- gcc/config/i386/i386-protos.h | 5 + gcc/config/i386/i386.cc | 50 +++++++ gcc/config/i386/i386.h | 1 + gcc/config/i386/i386.md | 35 ++++- gcc/config/i386/i386.opt | 3 + gcc/testsuite/gcc.target/i386/apx-ccmp-1.c | 104 +++++++++++++ gcc/testsuite/gcc.target/i386/apx-ccmp-2.c | 104 +++++++++++++ 10 files changed, 479 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/apx-ccmp-1.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ccmp-2.c