Message ID | 20240301062711.207137-1-demin.han@starfivetech.com |
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RISC-V: Support vf and vx for autovec comparison of
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Sorry for the unexpected truncation. Hi, vf and vx are not supported well when comparing vector and immediate in current autovec. For example, following insts generated for float type: flw vsetvli vfmv.v.f ... vmfxx.vv Two issues: 1. Additional vsetvl and vfmv instructions 2. Occupy one vector register and may results in smaller lmul We expect: flw ... vmfxx.vf For simplicity of supporting vx and vf, two refactors completed first. 1. remove eqne pattern; any special case or reason for eqne when first added? 2. refactor duplicate code.