From patchwork Thu Aug 3 11:17:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenghui Pan X-Patchwork-Id: 1816401 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RGmZ356pDz1yds for ; Thu, 3 Aug 2023 21:18:51 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 942C43857719 for ; Thu, 3 Aug 2023 11:18:49 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 9EA813858C27 for ; Thu, 3 Aug 2023 11:18:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9EA813858C27 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.20.4.45]) by gateway (Coremail) with SMTP id _____8Cxh+j7jMtkZasPAA--.442S3; Thu, 03 Aug 2023 19:18:20 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.45]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxriPtjMtkMhtHAA--.12282S4; Thu, 03 Aug 2023 19:18:12 +0800 (CST) From: Chenghui Pan To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Chenghui Pan Subject: [PATCH v3 0/8] Add Loongson SX/ASX instruction support to LoongArch target. Date: Thu, 3 Aug 2023 19:17:42 +0800 Message-Id: <20230803111750.88323-1-panchenghui@loongson.cn> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxriPtjMtkMhtHAA--.12282S4 X-CM-SenderInfo: psdquxxhqjx33l6o00pqjv00gofq/1tbiAQAMBGTLKTABCgAIs8 X-Coremail-Antispam: 1Uk129KBj93XoWxKFy3Xry8Ar1xGrW5WrW5CFX_yoWxGr1Up3 y7urnxtF48JFZ3Jr1kJa43Xr4DJa4xK3ya93Way348CrWIqr9Fv3W8Jr9rXFy3Ga45tryI qrsY9w1UW3WYvacCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j1WlkUUUUU= X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This is an update of : https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624770.html Changes since last version: - Revert vabsd/xvabsd RTL templates to unspec impl, because arithmetic RTL expression cannot cover the edge case of the instruction output. v2 impl of vabsd/xvabsd template cause the failure of gcc.dg/sabd_1.c when running regression test with RUNTESTFLAGS="--target_board=unix/-mlsx". - Resolve warning in gcc/config/loongarch/loongarch.cc when bootstrapping with BOOT_CFLAGS="-O2 -ftree-vectorize -fno-vect-cost-model -mlasx". - Remove redundant definitions in lasxintrin.h. - Refine commit info. Lulu Cheng (8): LoongArch: Add Loongson SX vector directive compilation framework. LoongArch: Add Loongson SX base instruction support. LoongArch: Add Loongson SX directive builtin function support. LoongArch: Add Loongson ASX vector directive compilation framework. LoongArch: Add Loongson ASX base instruction support. LoongArch: Add Loongson ASX directive builtin function support. LoongArch: Add Loongson SX directive test cases. LoongArch: Add Loongson ASX directive test cases. gcc/config.gcc | 2 +- gcc/config/loongarch/constraints.md | 131 +- .../loongarch/genopts/loongarch-strings | 4 + gcc/config/loongarch/genopts/loongarch.opt.in | 12 +- gcc/config/loongarch/lasx.md | 5122 +++ gcc/config/loongarch/lasxintrin.h | 5338 +++ gcc/config/loongarch/loongarch-builtins.cc | 2686 +- gcc/config/loongarch/loongarch-c.cc | 18 + gcc/config/loongarch/loongarch-def.c | 6 + gcc/config/loongarch/loongarch-def.h | 9 +- gcc/config/loongarch/loongarch-driver.cc | 10 + gcc/config/loongarch/loongarch-driver.h | 2 + gcc/config/loongarch/loongarch-ftypes.def | 666 +- gcc/config/loongarch/loongarch-modes.def | 39 + gcc/config/loongarch/loongarch-opts.cc | 89 +- gcc/config/loongarch/loongarch-opts.h | 3 + gcc/config/loongarch/loongarch-protos.h | 35 + gcc/config/loongarch/loongarch-str.h | 3 + gcc/config/loongarch/loongarch.cc | 4669 +- gcc/config/loongarch/loongarch.h | 117 +- gcc/config/loongarch/loongarch.md | 56 +- gcc/config/loongarch/loongarch.opt | 12 +- gcc/config/loongarch/lsx.md | 4481 ++ gcc/config/loongarch/lsxintrin.h | 5181 +++ gcc/config/loongarch/predicates.md | 333 +- gcc/doc/md.texi | 11 + .../gcc.target/loongarch/strict-align.c | 13 + .../vector/lasx/lasx-bit-manipulate.c | 27813 +++++++++++ .../loongarch/vector/lasx/lasx-builtin.c | 1509 + .../loongarch/vector/lasx/lasx-cmp.c | 5361 +++ .../loongarch/vector/lasx/lasx-fp-arith.c | 6259 +++ .../loongarch/vector/lasx/lasx-fp-cvt.c | 7315 +++ .../loongarch/vector/lasx/lasx-int-arith.c | 38361 ++++++++++++++++ .../loongarch/vector/lasx/lasx-mem.c | 147 + .../loongarch/vector/lasx/lasx-perm.c | 7730 ++++ .../vector/lasx/lasx-str-manipulate.c | 712 + .../loongarch/vector/lasx/lasx-xvldrepl.c | 13 + .../loongarch/vector/lasx/lasx-xvstelm.c | 12 + .../loongarch/vector/loongarch-vector.exp | 42 + .../loongarch/vector/lsx/lsx-bit-manipulate.c | 15586 +++++++ .../loongarch/vector/lsx/lsx-builtin.c | 1461 + .../gcc.target/loongarch/vector/lsx/lsx-cmp.c | 3354 ++ .../loongarch/vector/lsx/lsx-fp-arith.c | 3713 ++ .../loongarch/vector/lsx/lsx-fp-cvt.c | 4114 ++ .../loongarch/vector/lsx/lsx-int-arith.c | 22424 +++++++++ .../gcc.target/loongarch/vector/lsx/lsx-mem.c | 537 + .../loongarch/vector/lsx/lsx-perm.c | 5555 +++ .../loongarch/vector/lsx/lsx-str-manipulate.c | 408 + .../loongarch/vector/simd_correctness_check.h | 39 + 49 files changed, 181229 insertions(+), 284 deletions(-) create mode 100644 gcc/config/loongarch/lasx.md create mode 100644 gcc/config/loongarch/lasxintrin.h create mode 100644 gcc/config/loongarch/lsx.md create mode 100644 gcc/config/loongarch/lsxintrin.h create mode 100644 gcc/testsuite/gcc.target/loongarch/strict-align.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-bit-manipulate.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-builtin.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-cmp.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-fp-arith.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-fp-cvt.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-int-arith.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-mem.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-perm.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-str-manipulate.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvstelm.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-bit-manipulate.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-builtin.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-cmp.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-fp-arith.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-fp-cvt.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-int-arith.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mem.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-perm.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-str-manipulate.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h