Message ID | 1505205277-26276-1-git-send-email-charles.baylis@linaro.org |
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Headers | show
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Addressing mode costs v3
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From: Charles Baylis <charles.baylis@linaro.org> This patch set includes the following updates from v2 [1]: . addr_mode_costs table moved into struct tune_params from struct cpu_cost_table (avoids overlap with AArch64 port) . CPU data bus width now comes from a table entry in struct tune_params. (Not intended to be 100% accurate, but sufficient for this patch series) . test cases for {pre,post}-indexed addressing [1] https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01518.html and https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01519.html Charles Baylis (3): [ARM] Add bus_width_bits to tune_params [ARM] Refactor costs calculation for MEM. [ARM] Add table of costs for AAarch32 addressing modes. gcc/config/arm/arm-protos.h | 22 +++ gcc/config/arm/arm.c | 172 ++++++++++++++++++++---- gcc/testsuite/gcc.target/arm/addr-modes-float.c | 42 ++++++ gcc/testsuite/gcc.target/arm/addr-modes-int.c | 46 +++++++ gcc/testsuite/gcc.target/arm/addr-modes.h | 53 ++++++++ 5 files changed, 310 insertions(+), 25 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/addr-modes-float.c create mode 100644 gcc/testsuite/gcc.target/arm/addr-modes-int.c create mode 100644 gcc/testsuite/gcc.target/arm/addr-modes.h