From patchwork Tue Oct 7 19:29:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 397402 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 930A314011B for ; Wed, 8 Oct 2014 06:32:22 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754840AbaJGTbq (ORCPT ); Tue, 7 Oct 2014 15:31:46 -0400 Received: from mail-pd0-f169.google.com ([209.85.192.169]:58131 "EHLO mail-pd0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932408AbaJGT3f (ORCPT ); Tue, 7 Oct 2014 15:29:35 -0400 Received: by mail-pd0-f169.google.com with SMTP id w10so5604605pde.0 for ; Tue, 07 Oct 2014 12:29:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=GlcpsXjPhkMhZJVMjp1+IQdy09d3VOAxOAQP359aByg=; b=vReo4wARosR3qjCW8Sux7P+tmPD/M2Lal/inlOJbwD4dBsQMB44eysBYA6hIjB3BRm XGj13FELxGiYZZ7hEN2EqsM9epsiQGJ7GYNF8S9YYE8XNeM8kyPLRS6/cRGf4ju72LkS P3sCbMvXQmMKK/N1fPj3R4gS8SpFmMbb8YDjavT4VJj5wpXLd71GuAoUIvTUaop60v2m HR/+xYGJceAcaDMvqiifzH83EnMjypqmUAoWqvgar9T06EPTZG3h2XPE5VQP5D+e21Vr 0e2egOLD8LddGdfFxzFFMtn9KkSXj7y3ERopL1Qiid6FcII+ZmDoAkUoiGBtjkInQ7i0 hV5w== X-Received: by 10.70.92.43 with SMTP id cj11mr5962195pdb.94.1412710175424; Tue, 07 Oct 2014 12:29:35 -0700 (PDT) Received: from Alpha.gateway.2wire.net (99-189-113-45.lightspeed.sntcca.sbcglobal.net. [99.189.113.45]) by mx.google.com with ESMTPSA id oo8sm14475055pdb.86.2014.10.07.12.29.34 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Oct 2014 12:29:35 -0700 (PDT) From: Nicolin Chen To: broonie@kernel.org Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, galak@codeaurora.org Subject: [PATCH 2/8] ASoC: fsl_spdif: Add indentation for binding doc to increase readability Date: Tue, 7 Oct 2014 12:29:05 -0700 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch simply adds indentations for DT binding doc to increase readability without changing any contents. Signed-off-by: Nicolin Chen --- .../devicetree/bindings/sound/fsl,spdif.txt | 37 +++++++++++----------- 1 file changed, 18 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.txt b/Documentation/devicetree/bindings/sound/fsl,spdif.txt index 3e9e82c8..b5ee32e 100644 --- a/Documentation/devicetree/bindings/sound/fsl,spdif.txt +++ b/Documentation/devicetree/bindings/sound/fsl,spdif.txt @@ -6,32 +6,31 @@ a fibre cable. Required properties: - - compatible : Compatible list, must contain "fsl,imx35-spdif". + - compatible : Compatible list, must contain "fsl,imx35-spdif". - - reg : Offset and length of the register set for the device. + - reg : Offset and length of the register set for the device. - - interrupts : Contains the spdif interrupt. + - interrupts : Contains the spdif interrupt. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. + - dmas : Generic dma devicetree binding as described in + Documentation/devicetree/bindings/dma/dma.txt. - - dma-names : Two dmas have to be defined, "tx" and "rx". + - dma-names : Two dmas have to be defined, "tx" and "rx". - - clocks : Contains an entry for each entry in clock-names. + - clocks : Contains an entry for each entry in clock-names. - - clock-names : Includes the following entries: - "core" The core clock of spdif controller - "rxtx<0-7>" Clock source list for tx and rx clock. - This clock list should be identical to - the source list connecting to the spdif - clock mux in "SPDIF Transceiver Clock - Diagram" of SoC reference manual. It - can also be referred to TxClk_Source - bit of register SPDIF_STC. + - clock-names : Includes the following entries: + "core" The core clock of spdif controller. + "rxtx<0-7>" Clock source list for tx and rx clock. + This clock list should be identical to the source + list connecting to the spdif clock mux in "SPDIF + Transceiver Clock Diagram" of SoC reference manual. + It can also be referred to TxClk_Source bit of + register SPDIF_STC. - - big-endian : If this property is absent, the native endian mode will - be in use as default, or the big endian mode will be in use for all the - device registers. + - big-endian : If this property is absent, the native endian mode + will be in use as default, or the big endian mode + will be in use for all the device registers. Example: