From patchwork Wed Jan 16 09:57:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Ferre X-Patchwork-Id: 1025731 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43fjNL6Gkgz9sCX for ; Wed, 16 Jan 2019 20:59:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403927AbfAPJ5x (ORCPT ); Wed, 16 Jan 2019 04:57:53 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:46512 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729085AbfAPJ5w (ORCPT ); Wed, 16 Jan 2019 04:57:52 -0500 X-IronPort-AV: E=Sophos;i="5.56,485,1539673200"; d="scan'208";a="25386552" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 16 Jan 2019 02:57:50 -0700 Received: from tenerife.corp.atmel.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.352.0; Wed, 16 Jan 2019 02:57:50 -0700 From: Nicolas Ferre To: Alexandre Belloni , Ludovic Desroches CC: , , Sebastian Reichel , , , "David S . Miller" , , Alan Stern , "Greg Kroah-Hartman" , Rob Herring , , Nicolas Ferre Subject: [PATCH 1/8] dt-bindings: arm: atmel: add missing samx7 to reset controller Date: Wed, 16 Jan 2019 10:57:37 +0100 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add this missing compatibility string to the Reset Controller compatible string chip list. Signed-off-by: Nicolas Ferre Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 14f319f694b7..36952cc39993 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -21,7 +21,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". - can be "at91sam9260" or "at91sam9g45" or "sama5d3" + can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" - reg: Should contain registers location and length - clocks: phandle to input clock.