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[91.13.114.174]) by smtp.gmail.com with ESMTPSA id r1sm34503314wrx.15.2018.11.17.08.17.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Nov 2018 08:17:22 -0800 (PST) Received: from chuck by debian64.daheim with local (Exim 4.91) (envelope-from ) id 1gO3Hd-0004YL-Tb; Sat, 17 Nov 2018 17:17:21 +0100 From: Christian Lamparter To: dmaengine@vger.kernel.org, devicetree@vger.kernel.org Cc: Dan Williams , Vinod Koul , Andy Shevchenko , Viresh Kumar , Rob Herring , Mark Rutland Subject: [PATCH v4 1/2] dt-bindings: dmaengine: dw-dmac: add protection control property Date: Sat, 17 Nov 2018 17:17:20 +0100 Message-Id: <9c621e11148a5971e34409d7024c48b783d75b1a.1542471341.git.chunkeey@gmail.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch for the DesignWare AHB Central Direct Memory Access Controller adds the dma protection control property: "snps,dma-protection-control" as well as the properties specific values defines into a new include file: include/dt-bindings/dma/dw-dmac.h Note: The protection control signals are one-to-one mapped to the AHB HPROT[1:3] signals for this controller. The HPROT0 (Data Access) is always hardwired to 1. Reviewed-by: Andy Shevchenko Reviewed-by: Rob Herring Signed-off-by: Christian Lamparter --- --- Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++++ MAINTAINERS | 4 +++- include/dt-bindings/dma/dw-dmac.h | 14 ++++++++++++++ 3 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/dma/dw-dmac.h diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt index 39e2b26be344..db757df7057d 100644 --- a/Documentation/devicetree/bindings/dma/snps-dma.txt +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt @@ -27,6 +27,10 @@ Optional properties: general purpose DMA channel allocator. False if not passed. - multi-block: Multi block transfers supported by hardware. Array property with one cell per channel. 0: not supported, 1 (default): supported. +- snps,dma-protection-control: AHB HPROT[3:1] protection setting. + The default value is 0 (for non-cacheable, non-buffered, + unprivileged data access). + Refer to include/dt-bindings/dma/dw-dmac.h for possible values. Example: diff --git a/MAINTAINERS b/MAINTAINERS index 3bd775ba51ce..68327503fa94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14379,9 +14379,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/snps-dma.txt +F: drivers/dma/dw/ +F: include/dt-bindings/dma/dw-dmac.h F: include/linux/dma/dw.h F: include/linux/platform_data/dma-dw.h -F: drivers/dma/dw/ SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER M: Jose Abreu diff --git a/include/dt-bindings/dma/dw-dmac.h b/include/dt-bindings/dma/dw-dmac.h new file mode 100644 index 000000000000..d1ca705c95b3 --- /dev/null +++ b/include/dt-bindings/dma/dw-dmac.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ + +#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__ +#define __DT_BINDINGS_DMA_DW_DMAC_H__ + +/* + * Protection Control bits provide protection against illegal transactions. + * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. + */ +#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */ +#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ +#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */ + +#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */