From patchwork Fri May 15 13:12:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Guido_G=C3=BCnther?= X-Patchwork-Id: 1291136 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sigxcpu.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49NpjR4L1hz9sV2 for ; Fri, 15 May 2020 23:12:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726247AbgEONM0 (ORCPT ); Fri, 15 May 2020 09:12:26 -0400 Received: from honk.sigxcpu.org ([24.134.29.49]:53478 "EHLO honk.sigxcpu.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726244AbgEONMY (ORCPT ); Fri, 15 May 2020 09:12:24 -0400 Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id 76D87FB03; Fri, 15 May 2020 15:12:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id g8I1dDNq2x7s; Fri, 15 May 2020 15:12:18 +0200 (CEST) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id 78087445AA; Fri, 15 May 2020 15:12:15 +0200 (CEST) From: =?utf-8?q?Guido_G=C3=BCnther?= To: Laurent Pinchart , David Airlie , Daniel Vetter , Rob Herring , Shawn Guo , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Andrzej Hajda , Sam Ravnborg , Anson Huang , Leonard Crestez , Lucas Stach , Peng Fan , Robert Chiras , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 3/6] dt-bindings: display/bridge/nwl-dsi: Drop mux handling Date: Fri, 15 May 2020 15:12:12 +0200 Message-Id: <9884c56219e9bdbeec179c27ea2b734dbb5f1289.1589548223.git.agx@sigxcpu.org> X-Mailer: git-send-email 2.26.1 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No need to encode the SoC specifics in the bridge driver. For the imx8mq we can use the mux-input-bridge. Signed-off-by: Guido Günther --- .../devicetree/bindings/display/bridge/nwl-dsi.yaml | 6 ------ 1 file changed, 6 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml index 8aff2d68fc33..d2c2d4e19a25 100644 --- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml @@ -46,10 +46,6 @@ properties: - const: phy_ref - const: lcdif - mux-controls: - description: - mux controller node to use for operating the input mux - phys: maxItems: 1 description: @@ -151,7 +147,6 @@ required: - clocks - compatible - interrupts - - mux-controls - phy-names - phys - ports @@ -180,7 +175,6 @@ examples: <&clk IMX8MQ_CLK_LCDIF_PIXEL>; clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif"; interrupts = ; - mux-controls = <&mux 0>; power-domains = <&pgc_mipi>; resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>, <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,