| Message ID | 8cb38b5236213a467c6c0073f97ccc4bfd5a39ff.1706717378.git.geert+renesas@glider.be |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v2] dt-bindings: timer: renesas,tmu: Document input capture interrupt | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
Hi Geert, Thanks for your work. On 2024-01-31 17:11:45 +0100, Geert Uytterhoeven wrote: > Some Timer Unit (TMU) instances with 3 channels support a fourth > interrupt: an input capture interrupt for the third channel. > > While at it, document the meaning of the four interrupts, and add > "interrupt-names" for clarity. > > Update the example to match reality. > > Inspired by a patch by Yoshinori Sato for SH. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > v2: > - Reword interrupt descriptions. > > The corresponding DTS updates can be found in series "[PATCH 0/2] > ARM/arm64: dts: renesas: Improve TMU interrupt descriptions". > https://lore.kernel.org/r/cover.1705325654.git.geert+renesas@glider.be > Once the DTS updates are upstream, "interrupt-names" can be made > required. > --- > .../devicetree/bindings/timer/renesas,tmu.yaml | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml > index a67e427a9e7e22aa..84bbe15028a1de94 100644 > --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml > +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml > @@ -46,7 +46,19 @@ properties: > > interrupts: > minItems: 2 > - maxItems: 3 > + items: > + - description: Underflow interrupt, channel 0 > + - description: Underflow interrupt, channel 1 > + - description: Underflow interrupt, channel 2 > + - description: Input capture interrupt, channel 2 > + > + interrupt-names: > + minItems: 2 > + items: > + - const: tuni0 > + - const: tuni1 > + - const: tuni2 > + - const: ticpi2 > > clocks: > maxItems: 1 > @@ -100,7 +112,9 @@ examples: > reg = <0xffd80000 0x30>; > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; > clocks = <&mstp0_clks R8A7779_CLK_TMU0>; > clock-names = "fck"; > power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; > -- > 2.34.1 > >
On 31/01/2024 19:00, Niklas Söderlund wrote: > Hi Geert, > > Thanks for your work. > > On 2024-01-31 17:11:45 +0100, Geert Uytterhoeven wrote: >> Some Timer Unit (TMU) instances with 3 channels support a fourth >> interrupt: an input capture interrupt for the third channel. >> >> While at it, document the meaning of the four interrupts, and add >> "interrupt-names" for clarity. >> >> Update the example to match reality. >> >> Inspired by a patch by Yoshinori Sato for SH. >> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > Applied, thanks
On Wed, Jan 31, 2024 at 05:11:45PM +0100, Geert Uytterhoeven wrote: > Some Timer Unit (TMU) instances with 3 channels support a fourth > interrupt: an input capture interrupt for the third channel. > > While at it, document the meaning of the four interrupts, and add > "interrupt-names" for clarity. > > Update the example to match reality. > > Inspired by a patch by Yoshinori Sato for SH. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml index a67e427a9e7e22aa..84bbe15028a1de94 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml @@ -46,7 +46,19 @@ properties: interrupts: minItems: 2 - maxItems: 3 + items: + - description: Underflow interrupt, channel 0 + - description: Underflow interrupt, channel 1 + - description: Underflow interrupt, channel 2 + - description: Input capture interrupt, channel 2 + + interrupt-names: + minItems: 2 + items: + - const: tuni0 + - const: tuni1 + - const: tuni2 + - const: ticpi2 clocks: maxItems: 1 @@ -100,7 +112,9 @@ examples: reg = <0xffd80000 0x30>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; clocks = <&mstp0_clks R8A7779_CLK_TMU0>; clock-names = "fck"; power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
Some Timer Unit (TMU) instances with 3 channels support a fourth interrupt: an input capture interrupt for the third channel. While at it, document the meaning of the four interrupts, and add "interrupt-names" for clarity. Update the example to match reality. Inspired by a patch by Yoshinori Sato for SH. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - Reword interrupt descriptions. The corresponding DTS updates can be found in series "[PATCH 0/2] ARM/arm64: dts: renesas: Improve TMU interrupt descriptions". https://lore.kernel.org/r/cover.1705325654.git.geert+renesas@glider.be Once the DTS updates are upstream, "interrupt-names" can be made required. --- .../devicetree/bindings/timer/renesas,tmu.yaml | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)