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[91.46.96.187]) by smtp.googlemail.com with ESMTPSA id f135sm5311075wmf.22.2016.04.26.15.52.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Apr 2016 15:52:12 -0700 (PDT) Received: from chuck by debian64.daheim with local (Exim 4.87) (envelope-from ) id 1avBpz-0006Kd-21; Wed, 27 Apr 2016 00:52:11 +0200 From: Christian Lamparter To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= , Kumar Gala , Ian Campbell , Mark Rutland , Pawel Moll , Rob Herring , Alexandre Courbot , Linus Walleij , Christian Lamparter Subject: [RFC v3 1/3] gpio: dt-bindings: add basic-mmio-gpio bindings Date: Wed, 27 Apr 2016 00:51:52 +0200 Message-Id: <7e8845e6b6384c6b5673532ebef79c8730ed7748.1461710784.git.chunkeey@googlemail.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Álvaro Fernández Rojas This patch adds the device tree bindings for the basic-mmio-gpio. The basic-mmio-gpio is already part of a the GPIO generic library and shares its compatible with the platform device. Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Christian Lamparter --- .../devicetree/bindings/gpio/basic-mmio-gpio.txt | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/basic-mmio-gpio.txt diff --git a/Documentation/devicetree/bindings/gpio/basic-mmio-gpio.txt b/Documentation/devicetree/bindings/gpio/basic-mmio-gpio.txt new file mode 100644 index 0000000..5efb155 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/basic-mmio-gpio.txt @@ -0,0 +1,73 @@ +Bindings for the generic driver for memory-mapped GPIO controllers. + +Required properties: + - compatible: should be "basic-mmio-gpio" + - reg-names: must contain + "dat" - data register + may contain + "set" - data set register + "clr" - data clear register + "dirout" - direction output register + "dirin" - direction input register + - reg: address + size pairs describing the GPIO register sets; + order must correspond with the order of entries in reg-names + - #gpio-cells = must be set to 2 + - gpio-controller: Marks the device node as a gpio controller. + +Optional properties: + - ngpio: specifies the number of gpio mapped in the register. + - big-endian: force big endian register accesses. + - big-endian-byte-order: assign GPIOs in reverse order. + - unreadable-reg-set: data set register is not readable. + - read-output-reg-set: cache value set for reads. + - unreadable-reg-dir: dirout/dirin register is not readable. + - no-output: GPIOs are read-only. + +The GPIO generic library provides support for basic memory-mapped GPIO +controllers. The configuration is detected by which resources are present. +The simplest form of a GPIO controller that the driver support is just a +single "dat" register, where GPIO state can be read and/or written. +However, the driver supports far more: + - 8/16/32/64 bits registers. The number of GPIOs is automatically + determined by the width of the registers. + - GPIO controllers with clear/set registers. + - GPIO controllers with a single "dat" register. + - Big endian bits/GPIOs ordering. + +For setting GPIO's there are three configurations: + 1. single input/output register resource (named "dat"), + 2. set/clear pair (named "set" and "clr"), + 3. single output register resource and single input resource + ("set" and dat"). + +For setting the GPIO direction, there are three configurations: + a. simple bidirection GPIO that requires no configuration. + b. an output direction register (named "dirout") + where a 1 bit indicates the GPIO is an output. + c. an input direction register (named "dirin") + where a 1 bit indicates the GPIO is an input. + +Examples: + + /* Configuration for single input/output register + * for eight simple bidirection GPIOs. + */ + gpio_a_1 { + compatible = "basic-mmio-gpio"; + reg = <0x18000000 0x1>; + reg-names = "dat"; + #gpio-cells = <2>; + gpio-controller; + }; + + /* Configuration for set/clear pair registers with + * 32 output direction register GPIOs. + */ + gpio_b_2 { + compatible = "basic-mmio-gpio"; + reg = <0x18000000 0x4>, <0x18000010 0x4>, + <0x18000004 0x4>, <0x18000008 0x4>; + reg-names = "dat", "set", "clr", "dirout"; + #gpio-cells = <2>; + gpio-controller; + };