Message ID | 6c4eb239cbde62e7e1a8c647c945e128a0b78b2b.1711504700.git.zhoubinbin@loongson.cn |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | Add Loongson-2k0500 and Loongson-2k2000 clock support | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/patch-applied | success |
Hi, Binbin, On Mon, Apr 1, 2024 at 4:24 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote: > > In the new Loongson-2K family of SoCs, more clock indexes are needed, > such as clock gates. > The patch adds these clock indexes > > Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> > Acked-by: Conor Dooley <conor.dooley@microchip.com> > --- > include/dt-bindings/clock/loongson,ls2k-clk.h | 56 ++++++++++++------- > 1 file changed, 37 insertions(+), 19 deletions(-) > > diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h > index 3bc4dfc193c2..4e6811eca8c6 100644 > --- a/include/dt-bindings/clock/loongson,ls2k-clk.h > +++ b/include/dt-bindings/clock/loongson,ls2k-clk.h > @@ -7,24 +7,42 @@ > #ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H > #define __DT_BINDINGS_CLOCK_LOONGSON2_H > > -#define LOONGSON2_REF_100M 0 > -#define LOONGSON2_NODE_PLL 1 > -#define LOONGSON2_DDR_PLL 2 > -#define LOONGSON2_DC_PLL 3 > -#define LOONGSON2_PIX0_PLL 4 > -#define LOONGSON2_PIX1_PLL 5 > -#define LOONGSON2_NODE_CLK 6 > -#define LOONGSON2_HDA_CLK 7 > -#define LOONGSON2_GPU_CLK 8 > -#define LOONGSON2_DDR_CLK 9 > -#define LOONGSON2_GMAC_CLK 10 > -#define LOONGSON2_DC_CLK 11 > -#define LOONGSON2_APB_CLK 12 > -#define LOONGSON2_USB_CLK 13 > -#define LOONGSON2_SATA_CLK 14 > -#define LOONGSON2_PIX0_CLK 15 > -#define LOONGSON2_PIX1_CLK 16 > -#define LOONGSON2_BOOT_CLK 17 > -#define LOONGSON2_CLK_END 18 > +#define LOONGSON2_REF_100M 0 > +#define LOONGSON2_NODE_PLL 1 > +#define LOONGSON2_DDR_PLL 2 > +#define LOONGSON2_DC_PLL 3 > +#define LOONGSON2_PIX0_PLL 4 > +#define LOONGSON2_PIX1_PLL 5 > +#define LOONGSON2_NODE_CLK 6 > +#define LOONGSON2_HDA_CLK 7 > +#define LOONGSON2_GPU_CLK 8 > +#define LOONGSON2_DDR_CLK 9 > +#define LOONGSON2_GMAC_CLK 10 > +#define LOONGSON2_DC_CLK 11 > +#define LOONGSON2_APB_CLK 12 > +#define LOONGSON2_USB_CLK 13 > +#define LOONGSON2_SATA_CLK 14 > +#define LOONGSON2_PIX0_CLK 15 > +#define LOONGSON2_PIX1_CLK 16 > +#define LOONGSON2_BOOT_CLK 17 > + > +/* Loongson-2K2000 */ This line should be removed, because the below definition is not specific to Loongson-2K2000. Huacai > +#define LOONGSON2_OUT0_GATE 18 > +#define LOONGSON2_GMAC_GATE 19 > +#define LOONGSON2_RIO_GATE 20 > +#define LOONGSON2_DC_GATE 21 > +#define LOONGSON2_GPU_GATE 22 > +#define LOONGSON2_DDR_GATE 23 > +#define LOONGSON2_HDA_GATE 24 > +#define LOONGSON2_NODE_GATE 25 > +#define LOONGSON2_EMMC_GATE 26 > +#define LOONGSON2_PIX0_GATE 27 > +#define LOONGSON2_PIX1_GATE 28 > +#define LOONGSON2_OUT0_CLK 29 > +#define LOONGSON2_RIO_CLK 30 > +#define LOONGSON2_EMMC_CLK 31 > +#define LOONGSON2_DES_CLK 32 > +#define LOONGSON2_I2S_CLK 33 > +#define LOONGSON2_MISC_CLK 34 > > #endif > -- > 2.43.0 >
On Tue, Apr 2, 2024 at 2:58 PM Huacai Chen <chenhuacai@kernel.org> wrote: > > Hi, Binbin, > > On Mon, Apr 1, 2024 at 4:24 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote: > > > > In the new Loongson-2K family of SoCs, more clock indexes are needed, > > such as clock gates. > > The patch adds these clock indexes > > > > Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> > > Acked-by: Conor Dooley <conor.dooley@microchip.com> > > --- > > include/dt-bindings/clock/loongson,ls2k-clk.h | 56 ++++++++++++------- > > 1 file changed, 37 insertions(+), 19 deletions(-) > > > > diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h > > index 3bc4dfc193c2..4e6811eca8c6 100644 > > --- a/include/dt-bindings/clock/loongson,ls2k-clk.h > > +++ b/include/dt-bindings/clock/loongson,ls2k-clk.h > > @@ -7,24 +7,42 @@ > > #ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H > > #define __DT_BINDINGS_CLOCK_LOONGSON2_H > > > > -#define LOONGSON2_REF_100M 0 > > -#define LOONGSON2_NODE_PLL 1 > > -#define LOONGSON2_DDR_PLL 2 > > -#define LOONGSON2_DC_PLL 3 > > -#define LOONGSON2_PIX0_PLL 4 > > -#define LOONGSON2_PIX1_PLL 5 > > -#define LOONGSON2_NODE_CLK 6 > > -#define LOONGSON2_HDA_CLK 7 > > -#define LOONGSON2_GPU_CLK 8 > > -#define LOONGSON2_DDR_CLK 9 > > -#define LOONGSON2_GMAC_CLK 10 > > -#define LOONGSON2_DC_CLK 11 > > -#define LOONGSON2_APB_CLK 12 > > -#define LOONGSON2_USB_CLK 13 > > -#define LOONGSON2_SATA_CLK 14 > > -#define LOONGSON2_PIX0_CLK 15 > > -#define LOONGSON2_PIX1_CLK 16 > > -#define LOONGSON2_BOOT_CLK 17 > > -#define LOONGSON2_CLK_END 18 > > +#define LOONGSON2_REF_100M 0 > > +#define LOONGSON2_NODE_PLL 1 > > +#define LOONGSON2_DDR_PLL 2 > > +#define LOONGSON2_DC_PLL 3 > > +#define LOONGSON2_PIX0_PLL 4 > > +#define LOONGSON2_PIX1_PLL 5 > > +#define LOONGSON2_NODE_CLK 6 > > +#define LOONGSON2_HDA_CLK 7 > > +#define LOONGSON2_GPU_CLK 8 > > +#define LOONGSON2_DDR_CLK 9 > > +#define LOONGSON2_GMAC_CLK 10 > > +#define LOONGSON2_DC_CLK 11 > > +#define LOONGSON2_APB_CLK 12 > > +#define LOONGSON2_USB_CLK 13 > > +#define LOONGSON2_SATA_CLK 14 > > +#define LOONGSON2_PIX0_CLK 15 > > +#define LOONGSON2_PIX1_CLK 16 > > +#define LOONGSON2_BOOT_CLK 17 > > + > > +/* Loongson-2K2000 */ > This line should be removed, because the below definition is not > specific to Loongson-2K2000. Yes, it was my mistake, I forgot to drop it. I will fix it in the next version. Thanks. Binbin > > Huacai > > > +#define LOONGSON2_OUT0_GATE 18 > > +#define LOONGSON2_GMAC_GATE 19 > > +#define LOONGSON2_RIO_GATE 20 > > +#define LOONGSON2_DC_GATE 21 > > +#define LOONGSON2_GPU_GATE 22 > > +#define LOONGSON2_DDR_GATE 23 > > +#define LOONGSON2_HDA_GATE 24 > > +#define LOONGSON2_NODE_GATE 25 > > +#define LOONGSON2_EMMC_GATE 26 > > +#define LOONGSON2_PIX0_GATE 27 > > +#define LOONGSON2_PIX1_GATE 28 > > +#define LOONGSON2_OUT0_CLK 29 > > +#define LOONGSON2_RIO_CLK 30 > > +#define LOONGSON2_EMMC_CLK 31 > > +#define LOONGSON2_DES_CLK 32 > > +#define LOONGSON2_I2S_CLK 33 > > +#define LOONGSON2_MISC_CLK 34 > > > > #endif > > -- > > 2.43.0 > >
diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h index 3bc4dfc193c2..4e6811eca8c6 100644 --- a/include/dt-bindings/clock/loongson,ls2k-clk.h +++ b/include/dt-bindings/clock/loongson,ls2k-clk.h @@ -7,24 +7,42 @@ #ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H #define __DT_BINDINGS_CLOCK_LOONGSON2_H -#define LOONGSON2_REF_100M 0 -#define LOONGSON2_NODE_PLL 1 -#define LOONGSON2_DDR_PLL 2 -#define LOONGSON2_DC_PLL 3 -#define LOONGSON2_PIX0_PLL 4 -#define LOONGSON2_PIX1_PLL 5 -#define LOONGSON2_NODE_CLK 6 -#define LOONGSON2_HDA_CLK 7 -#define LOONGSON2_GPU_CLK 8 -#define LOONGSON2_DDR_CLK 9 -#define LOONGSON2_GMAC_CLK 10 -#define LOONGSON2_DC_CLK 11 -#define LOONGSON2_APB_CLK 12 -#define LOONGSON2_USB_CLK 13 -#define LOONGSON2_SATA_CLK 14 -#define LOONGSON2_PIX0_CLK 15 -#define LOONGSON2_PIX1_CLK 16 -#define LOONGSON2_BOOT_CLK 17 -#define LOONGSON2_CLK_END 18 +#define LOONGSON2_REF_100M 0 +#define LOONGSON2_NODE_PLL 1 +#define LOONGSON2_DDR_PLL 2 +#define LOONGSON2_DC_PLL 3 +#define LOONGSON2_PIX0_PLL 4 +#define LOONGSON2_PIX1_PLL 5 +#define LOONGSON2_NODE_CLK 6 +#define LOONGSON2_HDA_CLK 7 +#define LOONGSON2_GPU_CLK 8 +#define LOONGSON2_DDR_CLK 9 +#define LOONGSON2_GMAC_CLK 10 +#define LOONGSON2_DC_CLK 11 +#define LOONGSON2_APB_CLK 12 +#define LOONGSON2_USB_CLK 13 +#define LOONGSON2_SATA_CLK 14 +#define LOONGSON2_PIX0_CLK 15 +#define LOONGSON2_PIX1_CLK 16 +#define LOONGSON2_BOOT_CLK 17 + +/* Loongson-2K2000 */ +#define LOONGSON2_OUT0_GATE 18 +#define LOONGSON2_GMAC_GATE 19 +#define LOONGSON2_RIO_GATE 20 +#define LOONGSON2_DC_GATE 21 +#define LOONGSON2_GPU_GATE 22 +#define LOONGSON2_DDR_GATE 23 +#define LOONGSON2_HDA_GATE 24 +#define LOONGSON2_NODE_GATE 25 +#define LOONGSON2_EMMC_GATE 26 +#define LOONGSON2_PIX0_GATE 27 +#define LOONGSON2_PIX1_GATE 28 +#define LOONGSON2_OUT0_CLK 29 +#define LOONGSON2_RIO_CLK 30 +#define LOONGSON2_EMMC_CLK 31 +#define LOONGSON2_DES_CLK 32 +#define LOONGSON2_I2S_CLK 33 +#define LOONGSON2_MISC_CLK 34 #endif