From patchwork Fri Jun 2 20:30:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joshua Clayton X-Patchwork-Id: 770600 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wfbVt3W1Rz9s76 for ; Sat, 3 Jun 2017 06:32:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hDc6Mp5F"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751262AbdFBUbN (ORCPT ); Fri, 2 Jun 2017 16:31:13 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:35431 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750966AbdFBUbK (ORCPT ); Fri, 2 Jun 2017 16:31:10 -0400 Received: by mail-pf0-f194.google.com with SMTP id u26so13683085pfd.2; Fri, 02 Jun 2017 13:31:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=OP2rSAg5Qr1rhlZll0Exytk2+XGEQYEXRCQ2Bb5FMHY=; b=hDc6Mp5FPk6NKHp7My9N3Raawk+4lXiWVvJ3JCC7FaalX+cFVBq0CgE9zT3I1Os8X9 LJSzlLU7SMxGOtGHM6ccwGR5+g+wvudal5MDbpASljc2z3Naef3CR/dmPHN1i6saQ1kA rxJffmxOSZ5+7MkDnK76Z5Nn+mD79w7BA8BxeiC1cR206UynLG6DbWoKbU1PajJReJBQ mPAJWdQDC0y8bC/8Xfcpw+kKdkJKC64s6zOByoe4+ym2j29JA0wX9+ckh1PB5sF8yH9k +xRLscc4C+nWkvVGsyFw5sI7wtKhJRKD3lZOU5wNoq2GUa2S2p/ZwaP+H1re5yJPGpot UR/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=OP2rSAg5Qr1rhlZll0Exytk2+XGEQYEXRCQ2Bb5FMHY=; b=mj79Qj3nTsgXUEIP9zB7JLiLL/mqS3u3aAT+DVqshAymDM8Xfz3rTd2FYAgkzm6Kgo vPOU8gI/Ixt/dX2lL3K0HqhGWm+KLxXBpuwwi6wI/lMO7jzfdqr9lV+fFlqh6fz3N3UL G/R5fN+8iW8W5KNFPU7Kay//icy1hfX37XgNfWHNkY2tNfTr0xSZIZoXhyvLxxwg9XAJ pET4TgoWjRloclKmV6XT8Jrtxfq75HKWiWcSVNn+8L+OfJkqfpZ9elTwLpSfTXtxoMB8 3Bo5EldjPGViY/lfdXhGWh98UtoDgwCvS4IrSPeo/gTwmuCHzzg3TmANsnfbQHNogGWh R4BQ== X-Gm-Message-State: AODbwcDC0hIGbwjg0mypTglVFwlcc06+IapkI7gT8X87BCJo2OFG0QBq zAEvC7JV0HLmGg== X-Received: by 10.99.63.140 with SMTP id m134mr4346881pga.170.1496435469478; Fri, 02 Jun 2017 13:31:09 -0700 (PDT) Received: from localhost.localdomain (68-185-59-186.static.knwc.wa.charter.com. [68.185.59.186]) by smtp.gmail.com with ESMTPSA id c4sm6967218pfg.31.2017.06.02.13.31.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Jun 2017 13:31:07 -0700 (PDT) From: Joshua Clayton To: Alan Tull , Moritz Fischer , Anatolij Gustschin , Bastian Stender , Shawn Guo , Joshua Clayton Cc: Rob Herring , Mark Rutland , Sascha Hauer , Fabio Estevam , Russell King , linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Date: Fri, 2 Jun 2017 13:30:48 -0700 Message-Id: <4945d90535e701e4e0207c08a7543a7623b94aeb.1496434383.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <684ea151ba9aa2c6555a299daf56552ddc11f596.1496434383.git.stillcompiling@gmail.com> References: <684ea151ba9aa2c6555a299daf56552ddc11f596.1496434383.git.stillcompiling@gmail.com> In-Reply-To: <20170525172911.11467-1-stillcompiling@gmail.com> References: <20170525172911.11467-1-stillcompiling@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe an altera-passive-serial devicetree entry, required features Signed-off-by: Joshua Clayton Acked-by: Rob Herring Signed-off-by: Alan Tull --- .../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt new file mode 100644 index 000000000000..48478bc07e29 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt @@ -0,0 +1,29 @@ +Altera Passive Serial SPI FPGA Manager + +Altera FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible: Must be one of the following: + "altr,fpga-passive-serial", + "altr,fpga-arria10-passive-serial" +- reg: SPI chip select of the FPGA +- nconfig-gpios: config pin (referred to as nCONFIG in the manual) +- nstat-gpios: status pin (referred to as nSTATUS in the manual) + +Optional properties: +- confd-gpios: confd pin (referred to as CONF_DONE in the manual) + +Example: + fpga: fpga@0 { + compatible = "altr,fpga-passive-serial"; + spi-max-frequency = <20000000>; + reg = <0>; + nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + };