From patchwork Tue Oct 7 19:29:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 397401 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E2E9914011B for ; Wed, 8 Oct 2014 06:32:19 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754907AbaJGTbr (ORCPT ); Tue, 7 Oct 2014 15:31:47 -0400 Received: from mail-pd0-f169.google.com ([209.85.192.169]:65257 "EHLO mail-pd0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932407AbaJGT3e (ORCPT ); Tue, 7 Oct 2014 15:29:34 -0400 Received: by mail-pd0-f169.google.com with SMTP id w10so5604585pde.0 for ; Tue, 07 Oct 2014 12:29:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=Mj9yuIMd9cSBvDwY8XpVs2bLlEUuCSJqjxv+0I0CGUs=; b=P+gcXQcD3NG+n9MVkBufO1eR8srELihuhF0M6vQ/dIsDwQPRzvIV7eDa7E6/vFzlsi S/yu49WEfnsOshHtDH7a3jBWahNQps+cFaK12ykHRCVnOXEmQMtX2BT3Il2Dac17dOh1 eXXH2s7u7oW1juEYyjIiNP03m2BkPJPmlHSk+XxcYiG2899MYZfF2MSPXZw1K2QrGRmZ +1GwArCoQw/9Y+NwuFcSvpLpuP8kEZdhAsSy5Ob53/7JOVxmjef0fkwQ2+K36i72r3yB p/uZJQDFAUDZy/rLb7OAHevhIG7nTm7zyrrtK+dZyyO4Oq3bsiNZbg7ti30tqM7HAASk Rfsg== X-Received: by 10.70.34.143 with SMTP id z15mr6013026pdi.92.1412710174295; Tue, 07 Oct 2014 12:29:34 -0700 (PDT) Received: from Alpha.gateway.2wire.net (99-189-113-45.lightspeed.sntcca.sbcglobal.net. [99.189.113.45]) by mx.google.com with ESMTPSA id oo8sm14475055pdb.86.2014.10.07.12.29.33 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Oct 2014 12:29:33 -0700 (PDT) From: Nicolin Chen To: broonie@kernel.org Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, galak@codeaurora.org Subject: [PATCH 1/8] ASoC: fsl_esai: Add indentation for binding doc to increase readability Date: Tue, 7 Oct 2014 12:29:04 -0700 Message-Id: <4695fdade8e76d91b7647471590bc96d970d15a9.1412708790.git.nicoleotsuka@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch simply adds indentations for DT binding doc to increase readability without changing any contents. Signed-off-by: Nicolin Chen --- .../devicetree/bindings/sound/fsl,esai.txt | 44 +++++++++++----------- 1 file changed, 23 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt index 52f5b6b..d3b6b5f 100644 --- a/Documentation/devicetree/bindings/sound/fsl,esai.txt +++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt @@ -7,37 +7,39 @@ other DSPs. It has up to six transmitters and four receivers. Required properties: - - compatible : Compatible list, must contain "fsl,imx35-esai" or - "fsl,vf610-esai" + - compatible : Compatible list, must contain "fsl,imx35-esai" or + "fsl,vf610-esai" - - reg : Offset and length of the register set for the device. + - reg : Offset and length of the register set for the device. - - interrupts : Contains the spdif interrupt. + - interrupts : Contains the spdif interrupt. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. + - dmas : Generic dma devicetree binding as described in + Documentation/devicetree/bindings/dma/dma.txt. - - dma-names : Two dmas have to be defined, "tx" and "rx". + - dma-names : Two dmas have to be defined, "tx" and "rx". - - clocks: Contains an entry for each entry in clock-names. + - clocks : Contains an entry for each entry in clock-names. - - clock-names : Includes the following entries: - "core" The core clock used to access registers - "extal" The esai baud clock for esai controller used to derive - HCK, SCK and FS. - "fsys" The system clock derived from ahb clock used to derive - HCK, SCK and FS. + - clock-names : Includes the following entries: + "core" The core clock used to access registers + "extal" The esai baud clock for esai controller used to + derive HCK, SCK and FS. + "fsys" The system clock derived from ahb clock used to + derive HCK, SCK and FS. - - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. - This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM]. + - fsl,fifo-depth : The number of elements in the transmit and receive + FIFOs. This number is the maximum allowed value for + TFCR[TFWM] or RFCR[RFWM]. - fsl,esai-synchronous: This is a boolean property. If present, indicating - that ESAI would work in the synchronous mode, which means all the settings - for Receiving would be duplicated from Transmition related registers. + that ESAI would work in the synchronous mode, which + means all the settings for Receiving would be + duplicated from Transmition related registers. - - big-endian : If this property is absent, the native endian mode will - be in use as default, or the big endian mode will be in use for all the - device registers. + - big-endian : If this property is absent, the native endian mode + will be in use as default, or the big endian mode + will be in use for all the device registers. Example: