From patchwork Wed Nov 30 01:11:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joshua Clayton X-Patchwork-Id: 700786 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tT2Sr0RbCz9vDk for ; Wed, 30 Nov 2016 12:12:12 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="iIyqZIxM"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756287AbcK3BMK (ORCPT ); Tue, 29 Nov 2016 20:12:10 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:36377 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754678AbcK3BMH (ORCPT ); Tue, 29 Nov 2016 20:12:07 -0500 Received: by mail-pf0-f196.google.com with SMTP id c4so9120361pfb.3; Tue, 29 Nov 2016 17:11:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=78J3A4jelMtS6oA8Xd5lb1QNBgDuInHkAYlYXkNPKIo=; b=iIyqZIxMoVNQ4Wd6lcq/hvPl+vO68/noKmLs8WpI0LpoMUPIAjgtTvJjO7aUhaTHOx Zhj9/kLy88DOk5dpofMaMmCwm/+nJnMKgivBun1k4uRHKYWeRe6Q70CueF/BIWTD3u+R UKdw1T03RkdcNuUbJE3Ws+HI+7mlYfSfpdVTOmOT4zJt6bdnv4YtnYKyFNxD8FLiUKPL WMXTqZk6VWW8mJPHf5/gsxM/BqAuIBBRS003EjzEdliN8dHZb/a9GA9LU+CfidAhhANj iqIGGifSpeWR9tb5NZOZgP1gUem64w/+rK0qt3U9PM6DLXYLGIuQvqXjj8xlL3v0wnRx 315Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=78J3A4jelMtS6oA8Xd5lb1QNBgDuInHkAYlYXkNPKIo=; b=Aiu1/E0S3lfZ8gqpTz1BNQhOeNih7FbsKBStMX/V7xmHHh4R6WugxuOeMu7RZI/88E ZGZNk9r5I8vt4JjQqh0W5dy05skjhH7O7OM2dR6A+Uc/GBCbZlCMakUHqc95QOvkj9L2 0ebzD3JuiKiPkwKtFQ9LjDP1nK1b2ex5uuXZWz2vnORVri04uCcanZ4Bw/pZj7cb1p5s 6kHDvNuGfmTgNbnTu7XDS8Dxd9PXnj7ekIi/xNunxaHfsGibJq9RCX0u1XKZNCcXLow1 Tf3OpN47cVWvu18Og3GJblljwIsf1RL93a/rOUh5h+EP/A7jKNK7pbOm+6T/BLSLcGX4 w7pw== X-Gm-Message-State: AKaTC007eOHvbfvxmSrG/0lyNYGtAKxYqsluZuzFHyziT2dGwVx8K8u3wtBf8aidCS6PsA== X-Received: by 10.84.178.195 with SMTP id z61mr68828808plb.176.1480468279936; Tue, 29 Nov 2016 17:11:19 -0800 (PST) Received: from jclayton-pc.columbia.uniwest.com (68-185-59-186.static.knwc.wa.charter.com. [68.185.59.186]) by smtp.gmail.com with ESMTPSA id 4sm79910873pgd.32.2016.11.29.17.11.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Nov 2016 17:11:18 -0800 (PST) From: Joshua Clayton To: Alan Tull , Moritz Fischer Cc: Rob Herring , Mark Rutland , Russell King , Joshua Clayton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/3] doc: dt: add cyclone-spi binding document Date: Tue, 29 Nov 2016 17:11:04 -0800 Message-Id: <2de74f6d2f2689b8ef090a9017db2ffb3bd319cb.1480467185.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe a cyclonei-ps-spi devicetree entry, required features Signed-off-by: Joshua Clayton --- .../bindings/fpga/cyclone-ps-spi-fpga-mgr.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt diff --git a/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt new file mode 100644 index 0000000..c942281 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt @@ -0,0 +1,23 @@ +Altera Cyclone Passive Serial SPI FPGA Manager + +Altera Cyclone FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically spi, and might require extra +circuits in order to play nicely with other spi slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible : should contain "altr,cyclone-ps-spi-fpga-mgr" +- reg : spi slave id of the fpga +- config-gpio : config pin (referred to as nCONFIG in the cyclone manual) +- status-gpio : status pin (referred to as nSTATUS in the cyclone manual) + +Example: + fpga_spi: evi-fpga-spi@0 { + compatible = "altr,cyclone-ps-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + config-gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>; + status-gpio = <&gpio4 11 GPIO_ACTIVE_HIGH>; + };