From patchwork Fri Oct 28 16:56:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joshua Clayton X-Patchwork-Id: 688534 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t591q1rCzz9sXx for ; Sat, 29 Oct 2016 03:58:23 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=mbHj7gYG; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965853AbcJ1Q6M (ORCPT ); Fri, 28 Oct 2016 12:58:12 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:34939 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031482AbcJ1Q4w (ORCPT ); Fri, 28 Oct 2016 12:56:52 -0400 Received: by mail-pf0-f194.google.com with SMTP id s8so1723822pfj.2; Fri, 28 Oct 2016 09:56:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=m5MNBkJl2hU7aLaOstspBmgQTyqoZ07fBlWKKk5JiHk=; b=mbHj7gYGYkPZKDfyQc8XNU/cKex5b1zfGA9dXLAafswZb+GuGdiHfmf+kBZLdZ1FUp Pc8MyV9FZT846z3QPZU5guAMzhXe0ff1AjWElldIs/oTzf+lXCBAu8B47KeJudC2QJSi aLiRKIcJAG+Ne7yJzWPJJl8wgfwE73LG5R112gweX07xqhQDmqWo2d6ckkVCuUdAnTKG GkXPkeHPVhQN3UdamsEYY/UhvNYcGuJkZfMDDfqaGU3oU5kNFbWcnleTzM1BQyFAo40p XqU2tfSGCMyzblDjCDN9c/HfyRJRKbQiv6qD+2cI6av45hKKkfvHKQ3Tj+G+3Vlv0MUA ucwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=m5MNBkJl2hU7aLaOstspBmgQTyqoZ07fBlWKKk5JiHk=; b=K4K9pqSsLKZ+IMdGdmDnGSXPpAmWgpWABr7SkY+P4xVA0JZXlNNhe3LVxSxu2hGTXI 9w/MGN2JMFv6ZyDPWqSlOTpMuUxJv7ocTThM0N8N46E807BXZy7QSIGmy1dSjbuxJmIb x3steVp3FB7j+YsG2fc2jdSQmyZjecg5BGVk5OMpOcrQYV00+xTj6X4JywB2w/mFsh+2 G9ENPGnKiEDwoflkN1HoWqHaG/K8SnUWiVAv0548qpszgjzQzEHJSQD64yXQ7yMLK0iI azIXRhkZtOXMF2aJw+GZkcSV+UMDwBVayagmykt+OSyF1ky5kJUUoyV/SDfoi1L9Y0zw gP1A== X-Gm-Message-State: ABUngvcPJelQGZ3kN9qW6nV8dByKcNvYaqMV/5r83FGvDT6o7DyyrX6/asbejq813tbTnQ== X-Received: by 10.99.149.6 with SMTP id p6mr22087582pgd.21.1477673811748; Fri, 28 Oct 2016 09:56:51 -0700 (PDT) Received: from jclayton-pc.columbia.uniwest.com (68-185-59-186.static.knwc.wa.charter.com. [68.185.59.186]) by smtp.gmail.com with ESMTPSA id h85sm20106124pfj.89.2016.10.28.09.56.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 28 Oct 2016 09:56:50 -0700 (PDT) From: Joshua Clayton To: Alan Tull , Moritz Fischer Cc: Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam , Russell King , Joshua Clayton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/5] doc: dt: add cyclone-spi binding document Date: Fri, 28 Oct 2016 09:56:39 -0700 Message-Id: <2de74f6d2f2689b8ef090a9017db2ffb3bd319cb.1477669745.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe a cyclonei-ps-spi devicetree entry, required features Signed-off-by: Joshua Clayton --- .../bindings/fpga/cyclone-ps-spi-fpga-mgr.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt diff --git a/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt new file mode 100644 index 0000000..c942281 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt @@ -0,0 +1,23 @@ +Altera Cyclone Passive Serial SPI FPGA Manager + +Altera Cyclone FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically spi, and might require extra +circuits in order to play nicely with other spi slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible : should contain "altr,cyclone-ps-spi-fpga-mgr" +- reg : spi slave id of the fpga +- config-gpio : config pin (referred to as nCONFIG in the cyclone manual) +- status-gpio : status pin (referred to as nSTATUS in the cyclone manual) + +Example: + fpga_spi: evi-fpga-spi@0 { + compatible = "altr,cyclone-ps-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + config-gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>; + status-gpio = <&gpio4 11 GPIO_ACTIVE_HIGH>; + };