Message ID | 20241106021357.19782-1-frawang.cn@gmail.com |
---|---|
State | Not Applicable |
Headers | show |
Series | [RESEND,v3,1/2] dt-bindings: phy: rockchip: add rk3576 compatible | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success |
Am Mittwoch, 6. November 2024, 03:13:57 CET schrieb Frank Wang: > From: Kever Yang <kever.yang@rock-chips.com> > > Rockchip RK3576 integrates two naneng-combo PHY, PHY0 is used for > PCIE and SATA, PHY1 is used for PCIE, SATA and USB3. > > This adds device specific data support. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > Signed-off-by: William Wu <william.wu@rock-chips.com> > Signed-off-by: Frank Wang <frank.wang@rock-chips.com> With less magic values, everything looks a bit nicer now, thanks a lot. Reviewed-by: Heiko Stuebner <heiko@sntech.de>
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml index d3cd7997879f7..1b3de6678c087 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml @@ -13,6 +13,7 @@ properties: compatible: enum: - rockchip,rk3568-naneng-combphy + - rockchip,rk3576-naneng-combphy - rockchip,rk3588-naneng-combphy reg: