| Message ID | 20240916163124.2223468-2-thippesw@amd.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add support for CPM5 controller 1 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Mon, Sep 16, 2024 at 10:01:23PM +0530, Thippeswamy Havalige wrote: > The Xilinx Versal Premium series includes the CPM5 block, which supports > two Type-A Root Port controllers operating at Gen5 speed. > > This patch adds a compatible string to distinguish between the two CPM5 > Root Port controllers. The error interrupt registers and corresponding bits > for Controller 0 and Controller 1 are located at different offsets, making > it necessary to differentiate them. > > By using the new compatible string, the driver can properly handle these > platform-specific differences between the controllers. > > Signed-off-by: Thippeswamy Havalige <thippesw@amd.com> > --- > changes in v2: > -------------- > Modify compatible string to differentiate controller 0 and controller 1 > --- > Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > index 989fb0fa2577..3783075661e2 100644 > --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > @@ -17,6 +17,7 @@ properties: > enum: > - xlnx,versal-cpm-host-1.00 > - xlnx,versal-cpm5-host > + - xlnx,versal-cpm5-host1-1 Hm, I thought my irony was obvious, but it seems was not. Apologies. "1-1", "1-2", "1-1-1" or "1-1.00-1" are all poor choices. I was waiting for some reasonable name idea, because it is you who knows the hardware and has datasheet. I guess if I have to come up with name then "host1" was better. Or "cpm5-1-host". Dunno, all these names "5" in "cpm5" and "-1.00" in IP version are randomly constructed. Best regards, Krzysztof
Hi Krzysztof, > -----Original Message----- > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: Tuesday, September 17, 2024 4:20 PM > To: Havalige, Thippeswamy <thippeswamy.havalige@amd.com> > Cc: manivannan.sadhasivam@linaro.org; robh@kernel.org; linux- > pci@vger.kernel.org; bhelgaas@google.com; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; > devicetree@vger.kernel.org; Gogada, Bharat Kumar > <bharat.kumar.gogada@amd.com>; Simek, Michal <michal.simek@amd.com>; > lpieralisi@kernel.org; kw@linux.com > Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: xilinx-cpm: Add compatible string for > CPM5 controller 1 > > On Mon, Sep 16, 2024 at 10:01:23PM +0530, Thippeswamy Havalige wrote: > > The Xilinx Versal Premium series includes the CPM5 block, which > > supports two Type-A Root Port controllers operating at Gen5 speed. > > > > This patch adds a compatible string to distinguish between the two > > CPM5 Root Port controllers. The error interrupt registers and > > corresponding bits for Controller 0 and Controller 1 are located at > > different offsets, making it necessary to differentiate them. > > > > By using the new compatible string, the driver can properly handle > > these platform-specific differences between the controllers. > > > > Signed-off-by: Thippeswamy Havalige <thippesw@amd.com> > > --- > > changes in v2: > > -------------- > > Modify compatible string to differentiate controller 0 and controller > > 1 > > --- > > Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git > > a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > > b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > > index 989fb0fa2577..3783075661e2 100644 > > --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > > +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml > > @@ -17,6 +17,7 @@ properties: > > enum: > > - xlnx,versal-cpm-host-1.00 > > - xlnx,versal-cpm5-host > > + - xlnx,versal-cpm5-host1-1 > > Hm, I thought my irony was obvious, but it seems was not. Apologies. > "1-1", "1-2", "1-1-1" or "1-1.00-1" are all poor choices. > > I was waiting for some reasonable name idea, because it is you who knows the > hardware and has datasheet. > > I guess if I have to come up with name then "host1" was better. Or "cpm5-1-host". > Dunno, all these names "5" in "cpm5" and "-1.00" in IP version are randomly > constructed. Here, CPM5 indicates gen5 Root Port and host1 indicates controller 1. So, Let me resend patch with compatible string as "xlnx,versal-cpm5-host1" it looks fine. > > Best regards, > Krzysztof
On 17/09/2024 14:32, Havalige, Thippeswamy wrote: > Hi Krzysztof, > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzk@kernel.org> >> Sent: Tuesday, September 17, 2024 4:20 PM >> To: Havalige, Thippeswamy <thippeswamy.havalige@amd.com> >> Cc: manivannan.sadhasivam@linaro.org; robh@kernel.org; linux- >> pci@vger.kernel.org; bhelgaas@google.com; linux-arm-kernel@lists.infradead.org; >> linux-kernel@vger.kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; >> devicetree@vger.kernel.org; Gogada, Bharat Kumar >> <bharat.kumar.gogada@amd.com>; Simek, Michal <michal.simek@amd.com>; >> lpieralisi@kernel.org; kw@linux.com >> Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: xilinx-cpm: Add compatible string for >> CPM5 controller 1 >> >> On Mon, Sep 16, 2024 at 10:01:23PM +0530, Thippeswamy Havalige wrote: >>> The Xilinx Versal Premium series includes the CPM5 block, which >>> supports two Type-A Root Port controllers operating at Gen5 speed. >>> >>> This patch adds a compatible string to distinguish between the two >>> CPM5 Root Port controllers. The error interrupt registers and >>> corresponding bits for Controller 0 and Controller 1 are located at >>> different offsets, making it necessary to differentiate them. >>> >>> By using the new compatible string, the driver can properly handle >>> these platform-specific differences between the controllers. >>> >>> Signed-off-by: Thippeswamy Havalige <thippesw@amd.com> >>> --- >>> changes in v2: >>> -------------- >>> Modify compatible string to differentiate controller 0 and controller >>> 1 >>> --- >>> Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml >>> b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml >>> index 989fb0fa2577..3783075661e2 100644 >>> --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml >>> +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml >>> @@ -17,6 +17,7 @@ properties: >>> enum: >>> - xlnx,versal-cpm-host-1.00 >>> - xlnx,versal-cpm5-host >>> + - xlnx,versal-cpm5-host1-1 >> >> Hm, I thought my irony was obvious, but it seems was not. Apologies. >> "1-1", "1-2", "1-1-1" or "1-1.00-1" are all poor choices. >> >> I was waiting for some reasonable name idea, because it is you who knows the >> hardware and has datasheet. >> >> I guess if I have to come up with name then "host1" was better. Or "cpm5-1-host". >> Dunno, all these names "5" in "cpm5" and "-1.00" in IP version are randomly >> constructed. > > Here, CPM5 indicates gen5 Root Port and host1 indicates controller 1. > So, Let me resend patch with compatible string as "xlnx,versal-cpm5-host1" it looks fine. yes, thanks. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml index 989fb0fa2577..3783075661e2 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml @@ -17,6 +17,7 @@ properties: enum: - xlnx,versal-cpm-host-1.00 - xlnx,versal-cpm5-host + - xlnx,versal-cpm5-host1-1 reg: items:
The Xilinx Versal Premium series includes the CPM5 block, which supports two Type-A Root Port controllers operating at Gen5 speed. This patch adds a compatible string to distinguish between the two CPM5 Root Port controllers. The error interrupt registers and corresponding bits for Controller 0 and Controller 1 are located at different offsets, making it necessary to differentiate them. By using the new compatible string, the driver can properly handle these platform-specific differences between the controllers. Signed-off-by: Thippeswamy Havalige <thippesw@amd.com> --- changes in v2: -------------- Modify compatible string to differentiate controller 0 and controller 1 --- Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 1 + 1 file changed, 1 insertion(+)