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12 Sep 2024 09:48:26 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 12 Sep 2024 09:47:57 -0700 Received: from valentina.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 12 Sep 2024 09:47:54 -0700 From: Valentina Fernandez To: , , , , , , , , , , , , , CC: , , , Subject: [PATCH v1 4/5] dt-bindings: remoteproc: add binding for Microchip IPC remoteproc Date: Thu, 12 Sep 2024 18:00:24 +0100 Message-ID: <20240912170025.455167-5-valentina.fernandezalanis@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240912170025.455167-1-valentina.fernandezalanis@microchip.com> References: <20240912170025.455167-1-valentina.fernandezalanis@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Microchip family of RISC-V SoCs typically has or more clusters. These clusters can be configured to run in Asymmetric Multi Processing (AMP) mode. Add a dt-binding for the Microchip IPC Remoteproc platform driver. Signed-off-by: Valentina Fernandez --- .../remoteproc/microchip,ipc-remoteproc.yaml | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/microchip,ipc-remoteproc.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/microchip,ipc-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/microchip,ipc-remoteproc.yaml new file mode 100644 index 000000000000..1765c68d22cf --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/microchip,ipc-remoteproc.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/microchip,ipc-remoteproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip IPC Remote Processor + +description: + Microchip family of RISC-V SoCs typically have one or more + clusters. These clusters can be configured to run in an Asymmetric + Multi Processing (AMP) mode where clusters are split in independent + software contexts. + + This document defines the binding for the remoteproc component that + loads and boots firmwares on remote clusters. + + This SBI interface is compatible with the Mi-V Inter-hart + Communication (IHC) IP. + +maintainers: + - Valentina Fernandez + +properties: + compatible: + const: microchip,ipc-remoteproc + + mboxes: + description: + This property is required only if the rpmsg/virtio functionality is used. + Microchip IPC mailbox specifier. To be used for communication with a + remote cluster. The specifier format is as per the bindings, + Documentation/devicetree/bindings/mailbox/microchip,sbi-ipc.yaml + maxItems: 1 + + microchip,auto-boot: + $ref: /schemas/types.yaml#/definitions/flag + description: + If defined, when remoteproc is probed, it loads the default firmware and + starts the remote processor. + + microchip,skip-ready-wait: + $ref: /schemas/types.yaml#/definitions/flag + description: + If defined, the master processor will not expect a ready signal from the + remote processor indicating it has booted successfully. This allows the + master processor to proceed with its operations without waiting for + confirmation from the remote processor. + + memory-region: + description: + If present, a phandle for a reserved memory area that used for vdev buffer, + resource table, vring region and others used by remote cluster. + +required: + - compatible + +additionalProperties: false + +examples: + - | + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + contextb: contextb_reserved@81000000 { + reg = <0x81000000 0x400000>; + no-map; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + rproc-contextb { + compatible = "microchip,ipc-remoteproc"; + memory-region = <&contextb>; + mboxes= <&ihc 8>; + }; + }; + +...