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Tue, 30 Jul 2024 05:48:47 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46U5mka3010909 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Jul 2024 05:48:46 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 29 Jul 2024 22:48:40 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan , Krzysztof Kozlowski Subject: [PATCH v6 2/5] dt-bindings: usb: qcom,dwc3: Update ipq5332 clock details Date: Tue, 30 Jul 2024 11:18:14 +0530 Message-ID: <20240730054817.1915652-3-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240730054817.1915652-1-quic_varada@quicinc.com> References: <20240730054817.1915652-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 71P2KIO1OaAbQniBi-tqlsJqqw6c0n3H X-Proofpoint-ORIG-GUID: 71P2KIO1OaAbQniBi-tqlsJqqw6c0n3H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_05,2024-07-26_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=999 malwarescore=0 bulkscore=0 phishscore=0 clxscore=1015 mlxscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300042 Unlike MSM SoC, IPQ SoC doesn't use RPM to aggregate bandwidth requests and scale the NoC frequency. The NoCs are turned on and set to a specific frequency at boot time and that is used for the lifetime of the system. Hence interconnect was not considered previously. The same approach was used for PCIe and at that point the consensus was to move to interconnect. Hence implemented the ICC driver and updating the existing USB driver to use the ICC driver. USB uses icc-clk framework to enable the NoC interface clock. Hence the 'iface' clock is removed from the list of clocks. Update the clock-names list accordingly. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Varadarajan Narayanan --- v6: Update commit message Add 'Reviewed-by: Krzysztof Kozlowski' v5: Use ipq4019-dwc3 clock details for ipq5332 instead of new one --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index efde47a5b145..aef42dacc202 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -164,6 +164,7 @@ allOf: contains: enum: - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 then: properties: clocks: @@ -267,7 +268,6 @@ allOf: contains: enum: - qcom,ipq5018-dwc3 - - qcom,ipq5332-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 then: