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Fri, 26 Jul 2024 22:09:40 -0700 (PDT) Received: from kousik.local ([2405:201:c006:380f:4245:58a3:6108:fcf0]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70ead87a372sm3495756b3a.166.2024.07.26.22.09.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jul 2024 22:09:40 -0700 (PDT) From: Kousik Sanagavarapu To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Kousik Sanagavarapu , Krzysztof Kozlowski Subject: [PATCH v4 2/2] dt-bindings: watchdog: ti,davinci-wdt: convert to dtschema Date: Sat, 27 Jul 2024 10:34:44 +0530 Message-ID: <20240727050736.4756-3-five231003@gmail.com> X-Mailer: git-send-email 2.45.2.827.g557ae147e6.dirty In-Reply-To: <20240727050736.4756-1-five231003@gmail.com> References: <20240727050736.4756-1-five231003@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert txt bindings of TI's DaVinci/Keystone Watchdog Timer Controller to dtschema to allow for validation. While at it, - Change the order of the compatibles. - Add "power-domains" to represent that the power domain maybe managed by TI-SCI controller if found on the SoC (for example, Keystone based K2G). w.r.t. to the txt binding to stay in sync with existing DTS. Signed-off-by: Kousik Sanagavarapu Reviewed-by: Krzysztof Kozlowski --- .../bindings/watchdog/davinci-wdt.txt | 24 -------- .../bindings/watchdog/ti,davinci-wdt.yaml | 55 +++++++++++++++++++ 2 files changed, 55 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/davinci-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt b/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt deleted file mode 100644 index aa10b8ec36e2..000000000000 --- a/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt +++ /dev/null @@ -1,24 +0,0 @@ -Texas Instruments DaVinci/Keystone Watchdog Timer (WDT) Controller - -Required properties: -- compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt" -- reg : Should contain WDT registers location and length - -Optional properties: -- timeout-sec : Contains the watchdog timeout in seconds -- clocks : the clock feeding the watchdog timer. - Needed if platform uses clocks. - See clock-bindings.txt - -Documentation: -Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf -Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf - -Examples: - -wdt: wdt@2320000 { - compatible = "ti,davinci-wdt"; - reg = <0x02320000 0x80>; - timeout-sec = <30>; - clocks = <&clkwdtimer0>; -}; diff --git a/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml new file mode 100644 index 000000000000..3c78f60f5f48 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/ti,davinci-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DaVinci/Keystone Watchdog Timer Controller + +maintainers: + - Kousik Sanagavarapu + +description: | + TI's Watchdog Timer Controller for DaVinci and Keystone Processors. + + Datasheets + + Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf + Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + oneOf: + - items: + - const: ti,keystone-wdt + - const: ti,davinci-wdt + - items: + - const: ti,davinci-wdt + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + wdt: watchdog@22f0080 { + compatible = "ti,keystone-wdt", "ti,davinci-wdt"; + reg = <0x022f0080 0x80>; + clocks = <&clkwdtimer0>; + }; + +...