| Message ID | 20240725121609.13101-7-pierre-henry.moussay@microchip.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [01/17] dt-bindings: can: mpfs: add PIC64GX CAN compatibility | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Thu, Jul 25, 2024 at 01:15:58PM +0100, pierre-henry.moussay@microchip.com wrote: > From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> > > The PIC64GX use an IP similar to MPFS one, therefore add compatibility with > MPFS as fallback It's the same, not similar ;) $subject should start with "dt-bindings: cache:" > > Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> > --- > Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > index 7e8cebe21584..9d064feb2ab1 100644 > --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > @@ -47,6 +47,11 @@ properties: > - const: microchip,mpfs-ccache > - const: sifive,fu540-c000-ccache > - const: cache > + - items: > + - const: microchip,pic64gx-ccache > + - const: microchip,mpfs-ccache > + - const: sifive,fu540-c000-ccache > + - const: cache > > cache-block-size: > const: 64 > @@ -93,6 +98,7 @@ allOf: > - starfive,jh7100-ccache > - starfive,jh7110-ccache > - microchip,mpfs-ccache > + - microchip,pic64gx-ccache > > then: > properties: > -- > 2.30.2 >
diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 7e8cebe21584..9d064feb2ab1 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -47,6 +47,11 @@ properties: - const: microchip,mpfs-ccache - const: sifive,fu540-c000-ccache - const: cache + - items: + - const: microchip,pic64gx-ccache + - const: microchip,mpfs-ccache + - const: sifive,fu540-c000-ccache + - const: cache cache-block-size: const: 64 @@ -93,6 +98,7 @@ allOf: - starfive,jh7100-ccache - starfive,jh7110-ccache - microchip,mpfs-ccache + - microchip,pic64gx-ccache then: properties: