new file mode 100644
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/toshiba,visconti5-viif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti5 SoC Video Input Interface
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+description: |-
+ Toshiba Visconti5 SoC Video Input Interface (VIIF) receives MIPI CSI2 video
+ stream, processes the stream with image signal processors (L1ISP, L2ISP),
+ then stores pictures to main memory.
+
+properties:
+ compatible:
+ const: toshiba,visconti5-viif
+
+ reg:
+ items:
+ - description: Registers for capture control
+ - description: Registers for CSI2 receiver control
+ - description: Registers for bus interface unit control
+ - description: Registers for Memory Protection Unit
+
+ interrupts:
+ items:
+ - description: Sync Interrupt
+ - description: Status (Error) Interrupt
+ - description: CSI2 Receiver Interrupt
+ - description: L1ISP Interrupt
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description: CSI-2 input port, with a single endpoint connected to the CSI-2 transmitter.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ additionalProperties: false
+
+ properties:
+ data-lanes:
+ description: VIIF supports 1, 2, 3 or 4 data lanes
+ minItems: 1
+ items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ clock-noncontinuous: true
+ link-frequencies: true
+ remote-endpoint: true
+
+ required:
+ - clock-noncontinuous
+ - data-lanes
+ - link-frequencies
+ - remote-endpoint
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - port
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ video@1c000000 {
+ compatible = "toshiba,visconti5-viif";
+ reg = <0 0x1c000000 0 0x6000>,
+ <0 0x1c008000 0 0x400>,
+ <0 0x1c00e000 0 0x1000>,
+ <0 0x2417a000 0 0x1000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi_in0: endpoint {
+ clock-noncontinuous;
+ data-lanes = <1 2>;
+ link-frequencies = /bits/ 64 <456000000>;
+ remote-endpoint = <&imx219_out0>;
+ };
+ };
+ };
+ };