Message ID | 20240417-msm8660-mmcc-v1-1-efc9e455268c@herrie.org |
---|---|
State | Changes Requested |
Headers | show |
Series | dt-bindings: clock: Add qcom MSM8660 MMCC defines | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/patch-applied | success |
On Wed, 17 Apr 2024 at 14:19, Herman van Hazendonk <github.com@herrie.org> wrote: > > From: Linus Walleij <linus.walleij@linaro.org> > > The compatible binding for the MSM8660 MMCC already exist > but the enumerator defines are missing. Add them. > > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Herman van Hazendonk <github.com@herrie.org> Bindings don't make sense without a driver to back them. Otherwise they are just dead headers. > --- > include/dt-bindings/clock/qcom,mmcc-msm8660.h | 75 +++++++++++++++++++++++++++ > include/dt-bindings/reset/qcom,mmcc-msm8660.h | 53 +++++++++++++++++++ > 2 files changed, 128 insertions(+) > > diff --git a/include/dt-bindings/clock/qcom,mmcc-msm8660.h b/include/dt-bindings/clock/qcom,mmcc-msm8660.h > new file mode 100644 > index 000000000000..2c7a6a3ae328 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,mmcc-msm8660.h > @@ -0,0 +1,75 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2013, The Linux Foundation. All rights reserved. > + */ > + > +#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8660_H > +#define _DT_BINDINGS_CLK_MSM_MMCC_8660_H > + > +#define GMEM_AXI_CLK 0 > +#define IJPEG_AXI_CLK 1 > +#define IMEM_AXI_CLK 2 > +#define JPEGD_AXI_CLK 3 > +#define MDP_AXI_CLK 4 > +#define VCODEC_AXI_CLK 5 > +#define VFE_AXI_CLK 6 > +#define ROT_AXI_CLK 7 > +#define VPE_AXI_CLK 8 > +#define SMI_2X_AXI_CLK 9 > +#define AMP_AHB_CLK 10 > +#define CSI0_AHB_CLK 11 > +#define CSI1_AHB_CLK 12 > +#define DSI_M_AHB_CLK 13 > +#define DSI_S_AHB_CLK 14 > +#define GFX2D0_AHB_CLK 15 > +#define GFX2D1_AHB_CLK 16 > +#define GFX3D_AHB_CLK 17 > +#define HDMI_M_AHB_CLK 18 > +#define HDMI_S_AHB_CLK 19 > +#define IJPEG_AHB_CLK 20 > +#define IMEM_AHB_CLK 21 > +#define JPEGD_AHB_CLK 22 > +#define MDP_AHB_CLK 23 > +#define ROT_AHB_CLK 24 > +#define SMMU_AHB_CLK 25 > +#define TV_ENC_AHB_CLK 26 > +#define VCODEC_AHB_CLK 27 > +#define VFE_AHB_CLK 28 > +#define VPE_AHB_CLK 29 > +#define GFX3D_SRC 30 > +#define GFX3D_CLK 31 > +#define MDP_SRC 32 > +#define MDP_CLK 33 > +#define MDP_VSYNC_SRC 34 > +#define MDP_VSYNC_CLK 35 > +#define MDP_PIXEL_SRC 36 > +#define MDP_PIXEL_CLK 37 > +#define MDP_LCDC_CLK 38 > +#define ROT_SRC 39 > +#define ROT_CLK 40 > +#define CAM_SRC 41 > +#define CAM_CLK 42 > +#define CSI_SRC 43 > +#define CSI0_CLK 44 > +#define CSI1_CLK 45 > +#define DSI_BYTE_SRC 46 > +#define DSI_BYTE_CLK 47 > +#define DSI_ESC_CLK 48 > +#define TV_SRC 49 > +#define TV_ENC_CLK 50 > +#define TV_DAC_CLK 51 > +#define MDP_TV_CLK 52 > +#define HDMI_TV_CLK 53 > +#define HDMI_APP_CLK 54 > +#define VCODEC_SRC 55 > +#define VCODEC_CLK 56 > +#define VPE_SRC 57 > +#define VPE_CLK 58 > +#define VFE_SRC 59 > +#define VFE_CLK 60 > +#define CSI0_VFE_CLK 61 > +#define CSI1_VFE_CLK 62 > +#define PLL2 63 > +#define PLL3 64 > + > +#endif > diff --git a/include/dt-bindings/reset/qcom,mmcc-msm8660.h b/include/dt-bindings/reset/qcom,mmcc-msm8660.h > new file mode 100644 > index 000000000000..c12156b3b8ac > --- /dev/null > +++ b/include/dt-bindings/reset/qcom,mmcc-msm8660.h > @@ -0,0 +1,53 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2013, The Linux Foundation. All rights reserved. > + */ > + > +#ifndef _DT_BINDINGS_RESET_MSM_MMCC_8660_H > +#define _DT_BINDINGS_RESET_MSM_MMCC_8660_H > + > +#define IJPEG_AXI_RESET 0 > +#define IMEM_AXI_RESET 1 > +#define MDP_AXI_RESET 2 > +#define VCODEC_AXI_RESET 3 > +#define VFE_AXI_RESET 4 > +#define ROT_AXI_RESET 5 > +#define VPE_AXI_RESET 6 > +#define AMP_AHB_RESET 7 > +#define CSI0_AHB_RESET 8 > +#define CSI1_AHB_RESET 9 > +#define DSI_M_AHB_RESET 10 > +#define DSI_S_AHB_RESET 11 > +#define GFX2D0_AHB_RESET 12 > +#define GFX2D1_AHB_RESET 13 > +#define GFX3D_AHB_RESET 14 > +#define HDMI_M_AHB_RESET 15 > +#define HDMI_S_AHB_RESET 16 > +#define IJPEG_AHB_RESET 17 > +#define IMEM_AHB_RESET 18 > +#define JPEGD_AHB_RESET 19 > +#define MDP_AHB_RESET 20 > +#define ROT_AHB_RESET 21 > +#define TV_ENC_AHB_RESET 22 > +#define VCODEC_AHB_RESET 23 > +#define VFE_AHB_RESET 24 > +#define VPE_AHB_RESET 25 > +#define MDP_RESET 26 > +#define MDP_VSYNC_RESET 27 > +#define MDP_PIXEL_RESET 28 > +#define ROT_RESET 29 > +#define GFX3D_RESET 30 > +#define CSI0_RESET 31 > +#define CSI1_RESET 32 > +#define DSI_BYTE_RESET 33 > +#define TV_ENC_RESET 34 > +#define MDP_TV_RESET 35 > +#define HDMI_TV_RESET 36 > +#define HDMI_APP_RESET 37 > +#define VCODEC_RESET 38 > +#define VPE_RESET 39 > +#define VFE_RESET 40 > +#define CSI0_VFE_RESET 41 > +#define CSI1_VFE_RESET 42 > + > +#endif > > --- > base-commit: 96fca68c4fbf77a8185eb10f7557e23352732ea2 > change-id: 20240417-msm8660-mmcc-51c1d1866dcb > > Best regards, > -- > Herman van Hazendonk <github.com@herrie.org> > >
On Wed, Apr 17, 2024 at 1:19 PM Herman van Hazendonk <github.com@herrie.org> wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > The compatible binding for the MSM8660 MMCC already exist > but the enumerator defines are missing. Add them. > > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Herman van Hazendonk <github.com@herrie.org> Same question as the other patch here: do you have it working on real hardware? I didn't submit it because I could never test it, and for me something was missing (like SAW regulators, interconnect or something like that). Yours, Linus Walleij
diff --git a/include/dt-bindings/clock/qcom,mmcc-msm8660.h b/include/dt-bindings/clock/qcom,mmcc-msm8660.h new file mode 100644 index 000000000000..2c7a6a3ae328 --- /dev/null +++ b/include/dt-bindings/clock/qcom,mmcc-msm8660.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8660_H +#define _DT_BINDINGS_CLK_MSM_MMCC_8660_H + +#define GMEM_AXI_CLK 0 +#define IJPEG_AXI_CLK 1 +#define IMEM_AXI_CLK 2 +#define JPEGD_AXI_CLK 3 +#define MDP_AXI_CLK 4 +#define VCODEC_AXI_CLK 5 +#define VFE_AXI_CLK 6 +#define ROT_AXI_CLK 7 +#define VPE_AXI_CLK 8 +#define SMI_2X_AXI_CLK 9 +#define AMP_AHB_CLK 10 +#define CSI0_AHB_CLK 11 +#define CSI1_AHB_CLK 12 +#define DSI_M_AHB_CLK 13 +#define DSI_S_AHB_CLK 14 +#define GFX2D0_AHB_CLK 15 +#define GFX2D1_AHB_CLK 16 +#define GFX3D_AHB_CLK 17 +#define HDMI_M_AHB_CLK 18 +#define HDMI_S_AHB_CLK 19 +#define IJPEG_AHB_CLK 20 +#define IMEM_AHB_CLK 21 +#define JPEGD_AHB_CLK 22 +#define MDP_AHB_CLK 23 +#define ROT_AHB_CLK 24 +#define SMMU_AHB_CLK 25 +#define TV_ENC_AHB_CLK 26 +#define VCODEC_AHB_CLK 27 +#define VFE_AHB_CLK 28 +#define VPE_AHB_CLK 29 +#define GFX3D_SRC 30 +#define GFX3D_CLK 31 +#define MDP_SRC 32 +#define MDP_CLK 33 +#define MDP_VSYNC_SRC 34 +#define MDP_VSYNC_CLK 35 +#define MDP_PIXEL_SRC 36 +#define MDP_PIXEL_CLK 37 +#define MDP_LCDC_CLK 38 +#define ROT_SRC 39 +#define ROT_CLK 40 +#define CAM_SRC 41 +#define CAM_CLK 42 +#define CSI_SRC 43 +#define CSI0_CLK 44 +#define CSI1_CLK 45 +#define DSI_BYTE_SRC 46 +#define DSI_BYTE_CLK 47 +#define DSI_ESC_CLK 48 +#define TV_SRC 49 +#define TV_ENC_CLK 50 +#define TV_DAC_CLK 51 +#define MDP_TV_CLK 52 +#define HDMI_TV_CLK 53 +#define HDMI_APP_CLK 54 +#define VCODEC_SRC 55 +#define VCODEC_CLK 56 +#define VPE_SRC 57 +#define VPE_CLK 58 +#define VFE_SRC 59 +#define VFE_CLK 60 +#define CSI0_VFE_CLK 61 +#define CSI1_VFE_CLK 62 +#define PLL2 63 +#define PLL3 64 + +#endif diff --git a/include/dt-bindings/reset/qcom,mmcc-msm8660.h b/include/dt-bindings/reset/qcom,mmcc-msm8660.h new file mode 100644 index 000000000000..c12156b3b8ac --- /dev/null +++ b/include/dt-bindings/reset/qcom,mmcc-msm8660.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_RESET_MSM_MMCC_8660_H +#define _DT_BINDINGS_RESET_MSM_MMCC_8660_H + +#define IJPEG_AXI_RESET 0 +#define IMEM_AXI_RESET 1 +#define MDP_AXI_RESET 2 +#define VCODEC_AXI_RESET 3 +#define VFE_AXI_RESET 4 +#define ROT_AXI_RESET 5 +#define VPE_AXI_RESET 6 +#define AMP_AHB_RESET 7 +#define CSI0_AHB_RESET 8 +#define CSI1_AHB_RESET 9 +#define DSI_M_AHB_RESET 10 +#define DSI_S_AHB_RESET 11 +#define GFX2D0_AHB_RESET 12 +#define GFX2D1_AHB_RESET 13 +#define GFX3D_AHB_RESET 14 +#define HDMI_M_AHB_RESET 15 +#define HDMI_S_AHB_RESET 16 +#define IJPEG_AHB_RESET 17 +#define IMEM_AHB_RESET 18 +#define JPEGD_AHB_RESET 19 +#define MDP_AHB_RESET 20 +#define ROT_AHB_RESET 21 +#define TV_ENC_AHB_RESET 22 +#define VCODEC_AHB_RESET 23 +#define VFE_AHB_RESET 24 +#define VPE_AHB_RESET 25 +#define MDP_RESET 26 +#define MDP_VSYNC_RESET 27 +#define MDP_PIXEL_RESET 28 +#define ROT_RESET 29 +#define GFX3D_RESET 30 +#define CSI0_RESET 31 +#define CSI1_RESET 32 +#define DSI_BYTE_RESET 33 +#define TV_ENC_RESET 34 +#define MDP_TV_RESET 35 +#define HDMI_TV_RESET 36 +#define HDMI_APP_RESET 37 +#define VCODEC_RESET 38 +#define VPE_RESET 39 +#define VFE_RESET 40 +#define CSI0_VFE_RESET 41 +#define CSI1_VFE_RESET 42 + +#endif