diff mbox series

[v7,17/23] dt-bindings: crypto: meson: remove clk and second interrupt line for GXL

Message ID 20240411133832.2896463-18-avromanov@salutedevices.com
State Changes Requested, archived
Headers show
Series Support more Amlogic SoC families in crypto driver | expand

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robh/patch-applied success
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robh/dt-meta-schema success

Commit Message

Alexey Romanov April 11, 2024, 1:38 p.m. UTC
GXL crypto IP isn't connected to clk and seconnd interrput line,
so we must remove them from dt-bindings.

Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings
documentation for amlogic-crypto")

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
---
 .../bindings/crypto/amlogic,gxl-crypto.yaml         | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

Comments

Conor Dooley April 15, 2024, 4:43 p.m. UTC | #1
On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> GXL crypto IP isn't connected to clk and seconnd interrput line,
> so we must remove them from dt-bindings.

How does the device work without a clock?

Cheers,
Conor.

> 
> Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings
> documentation for amlogic-crypto")
> 
> Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> ---
>  .../bindings/crypto/amlogic,gxl-crypto.yaml         | 13 +------------
>  1 file changed, 1 insertion(+), 12 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> index 948e11ebe4ee..d3af7b4d5f39 100644
> --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> @@ -20,20 +20,11 @@ properties:
>    interrupts:
>      items:
>        - description: Interrupt for flow 0
> -      - description: Interrupt for flow 1
> -
> -  clocks:
> -    maxItems: 1
> -
> -  clock-names:
> -    const: blkmv
>  
>  required:
>    - compatible
>    - reg
>    - interrupts
> -  - clocks
> -  - clock-names
>  
>  additionalProperties: false
>  
> @@ -46,7 +37,5 @@ examples:
>      crypto: crypto-engine@c883e000 {
>          compatible = "amlogic,gxl-crypto";
>          reg = <0xc883e000 0x36>;
> -        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
> -        clocks = <&clkc CLKID_BLKMV>;
> -        clock-names = "blkmv";
> +        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
>      };
> -- 
> 2.34.1
>
Alexey Romanov May 6, 2024, 1:48 p.m. UTC | #2
On Mon, Apr 15, 2024 at 05:43:15PM +0100, Conor Dooley wrote:
> On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> > GXL crypto IP isn't connected to clk and seconnd interrput line,
> > so we must remove them from dt-bindings.
> 
> How does the device work without a clock?

It's clocked by a common clock, the vendor didn't provide more
information. It doesn't have any special clock domains.

> 
> Cheers,
> Conor.
> 
> > 
> > Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings
> > documentation for amlogic-crypto")
> > 
> > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> > ---
> >  .../bindings/crypto/amlogic,gxl-crypto.yaml         | 13 +------------
> >  1 file changed, 1 insertion(+), 12 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > index 948e11ebe4ee..d3af7b4d5f39 100644
> > --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > @@ -20,20 +20,11 @@ properties:
> >    interrupts:
> >      items:
> >        - description: Interrupt for flow 0
> > -      - description: Interrupt for flow 1
> > -
> > -  clocks:
> > -    maxItems: 1
> > -
> > -  clock-names:
> > -    const: blkmv
> >  
> >  required:
> >    - compatible
> >    - reg
> >    - interrupts
> > -  - clocks
> > -  - clock-names
> >  
> >  additionalProperties: false
> >  
> > @@ -46,7 +37,5 @@ examples:
> >      crypto: crypto-engine@c883e000 {
> >          compatible = "amlogic,gxl-crypto";
> >          reg = <0xc883e000 0x36>;
> > -        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
> > -        clocks = <&clkc CLKID_BLKMV>;
> > -        clock-names = "blkmv";
> > +        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> >      };
> > -- 
> > 2.34.1
> >
Conor Dooley May 6, 2024, 3:47 p.m. UTC | #3
On Mon, May 06, 2024 at 01:48:01PM +0000, Alexey Romanov wrote:
> On Mon, Apr 15, 2024 at 05:43:15PM +0100, Conor Dooley wrote:
> > On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> > > GXL crypto IP isn't connected to clk and seconnd interrput line,
> > > so we must remove them from dt-bindings.
> > 
> > How does the device work without a clock?
> 
> It's clocked by a common clock, the vendor didn't provide more
> information. It doesn't have any special clock domains.

So the hardware block does have a clock, which, even if it is a clock
shared with other hardware blocks, makes your patch incorrect.

Is the "blkmv" clock the shared clock?

Cheers,
Conor.

> > > Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings
> > > documentation for amlogic-crypto")
> > > 
> > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> > > ---
> > >  .../bindings/crypto/amlogic,gxl-crypto.yaml         | 13 +------------
> > >  1 file changed, 1 insertion(+), 12 deletions(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > index 948e11ebe4ee..d3af7b4d5f39 100644
> > > --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > @@ -20,20 +20,11 @@ properties:
> > >    interrupts:
> > >      items:
> > >        - description: Interrupt for flow 0
> > > -      - description: Interrupt for flow 1
> > > -
> > > -  clocks:
> > > -    maxItems: 1
> > > -
> > > -  clock-names:
> > > -    const: blkmv
> > >  
> > >  required:
> > >    - compatible
> > >    - reg
> > >    - interrupts
> > > -  - clocks
> > > -  - clock-names
> > >  
> > >  additionalProperties: false
> > >  
> > > @@ -46,7 +37,5 @@ examples:
> > >      crypto: crypto-engine@c883e000 {
> > >          compatible = "amlogic,gxl-crypto";
> > >          reg = <0xc883e000 0x36>;
> > > -        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
> > > -        clocks = <&clkc CLKID_BLKMV>;
> > > -        clock-names = "blkmv";
> > > +        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> > >      };
> > > -- 
> > > 2.34.1
> > > 
> 
> 
> 
> 
> -- 
> Thank you,
> Alexey
Alexey Romanov May 23, 2024, 10:46 a.m. UTC | #4
Hi Conor,

On Mon, May 06, 2024 at 04:47:29PM +0100, Conor Dooley wrote:
> On Mon, May 06, 2024 at 01:48:01PM +0000, Alexey Romanov wrote:
> > On Mon, Apr 15, 2024 at 05:43:15PM +0100, Conor Dooley wrote:
> > > On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> > > > GXL crypto IP isn't connected to clk and seconnd interrput line,
> > > > so we must remove them from dt-bindings.
> > > 
> > > How does the device work without a clock?
> > 
> > It's clocked by a common clock, the vendor didn't provide more
> > information. It doesn't have any special clock domains.
> 
> So the hardware block does have a clock, which, even if it is a clock
> shared with other hardware blocks, makes your patch incorrect.
> 
> Is the "blkmv" clock the shared clock?

I received accurate information from the vendor. Starting from GXL,
DMA engine is used for crypto HW and clock is hard weired to it (at RTL
level). That's why we have to remove it from device tree, because we can't
control it anyway.

I will add clarification about this in commit message in text patch
series.


> 
> Cheers,
> Conor.
> 
> > > > Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings
> > > > documentation for amlogic-crypto")
> > > > 
> > > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> > > > ---
> > > >  .../bindings/crypto/amlogic,gxl-crypto.yaml         | 13 +------------
> > > >  1 file changed, 1 insertion(+), 12 deletions(-)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > > index 948e11ebe4ee..d3af7b4d5f39 100644
> > > > --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > > +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > > @@ -20,20 +20,11 @@ properties:
> > > >    interrupts:
> > > >      items:
> > > >        - description: Interrupt for flow 0
> > > > -      - description: Interrupt for flow 1
> > > > -
> > > > -  clocks:
> > > > -    maxItems: 1
> > > > -
> > > > -  clock-names:
> > > > -    const: blkmv
> > > >  
> > > >  required:
> > > >    - compatible
> > > >    - reg
> > > >    - interrupts
> > > > -  - clocks
> > > > -  - clock-names
> > > >  
> > > >  additionalProperties: false
> > > >  
> > > > @@ -46,7 +37,5 @@ examples:
> > > >      crypto: crypto-engine@c883e000 {
> > > >          compatible = "amlogic,gxl-crypto";
> > > >          reg = <0xc883e000 0x36>;
> > > > -        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
> > > > -        clocks = <&clkc CLKID_BLKMV>;
> > > > -        clock-names = "blkmv";
> > > > +        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> > > >      };
> > > > -- 
> > > > 2.34.1
> > > > 
> > 
> > 
> > 
> > 
> > -- 
> > Thank you,
> > Alexey
Conor Dooley May 23, 2024, 2:37 p.m. UTC | #5
On Thu, May 23, 2024 at 10:46:35AM +0000, Alexey Romanov wrote:
> Hi Conor,
> 
> On Mon, May 06, 2024 at 04:47:29PM +0100, Conor Dooley wrote:
> > On Mon, May 06, 2024 at 01:48:01PM +0000, Alexey Romanov wrote:
> > > On Mon, Apr 15, 2024 at 05:43:15PM +0100, Conor Dooley wrote:
> > > > On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> > > > > GXL crypto IP isn't connected to clk and seconnd interrput line,
> > > > > so we must remove them from dt-bindings.
> > > > 
> > > > How does the device work without a clock?
> > > 
> > > It's clocked by a common clock, the vendor didn't provide more
> > > information. It doesn't have any special clock domains.
> > 
> > So the hardware block does have a clock, which, even if it is a clock
> > shared with other hardware blocks, makes your patch incorrect.
> > 
> > Is the "blkmv" clock the shared clock?
> 
> I received accurate information from the vendor. Starting from GXL,
> DMA engine is used for crypto HW and clock is hard weired to it (at RTL
> level).

> That's why we have to remove it from device tree, because we can't
> control it anyway.

That's not true, if the clock runs at a fixed frequency it should be
described as a fixed-clock in the devicetree.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
index 948e11ebe4ee..d3af7b4d5f39 100644
--- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
@@ -20,20 +20,11 @@  properties:
   interrupts:
     items:
       - description: Interrupt for flow 0
-      - description: Interrupt for flow 1
-
-  clocks:
-    maxItems: 1
-
-  clock-names:
-    const: blkmv
 
 required:
   - compatible
   - reg
   - interrupts
-  - clocks
-  - clock-names
 
 additionalProperties: false
 
@@ -46,7 +37,5 @@  examples:
     crypto: crypto-engine@c883e000 {
         compatible = "amlogic,gxl-crypto";
         reg = <0xc883e000 0x36>;
-        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
-        clocks = <&clkc CLKID_BLKMV>;
-        clock-names = "blkmv";
+        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
     };