Message ID | 20240208215926.10085-3-zajec5@gmail.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | dt-bindings: arm: mediatek: convert MT7622-related bindings to the json-schema | expand |
Context | Check | Description |
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robh/checkpatch | warning | total: 0 errors, 2 warnings, 45 lines checked |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success |
On 08/02/2024 22:59, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. Introduced changes: > 1. Documented "reg" property > 2. Dropped "syscon" as it was incorrectly used > 3. Adjusted nodename, "compatible" and "reg" in example > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Il 08/02/24 22:59, Rafał Miłecki ha scritto: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. Introduced changes: > 1. Documented "reg" property > 2. Dropped "syscon" as it was incorrectly used > 3. Adjusted nodename, "compatible" and "reg" in example > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pciesys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pciesys.txt deleted file mode 100644 index d179a61536f4..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pciesys.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek PCIESYS controller -============================ - -The MediaTek PCIESYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt7622-pciesys", "syscon" - - "mediatek,mt7629-pciesys", "syscon" -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The PCIESYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -pciesys: pciesys@1a100800 { - compatible = "mediatek,mt7622-pciesys", "syscon"; - reg = <0 0x1a100800 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml new file mode 100644 index 000000000000..27b19d5e3a85 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt7622-pciesys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek PCIESYS controller + +description: + The MediaTek PCIESYS controller provides various clocks to the system. + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + +properties: + compatible: + enum: + - mediatek,mt7622-pciesys + - mediatek,mt7629-pciesys + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + description: The available clocks are defined in dt-bindings/clock/mt*-clk.h + + "#reset-cells": + const: 1 + +required: + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + clock-controller@1a100800 { + compatible = "mediatek,mt7622-pciesys"; + reg = <0x1a100800 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + };