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([2a01:e0a:999:a3a0:c564:f167:d072:5672]) by smtp.gmail.com with ESMTPSA id m27-20020a05600c3b1b00b0040b38292253sm22433137wms.30.2023.12.13.03.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 03:33:14 -0800 (PST) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Robbin Ehn Subject: [PATCH 3/9] dt-bindings: riscv: add Zam ISA extension description Date: Wed, 13 Dec 2023 12:32:59 +0100 Message-ID: <20231213113308.133176-4-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213113308.133176-1-cleger@rivosinc.com> References: <20231213113308.133176-1-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add description for the Zam ISA extension. Signed-off-by: Clément Léger --- Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 3574a0b70be4..912cc6a42eb4 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -171,6 +171,11 @@ properties: memory types as ratified in the 20191213 version of the privileged ISA specification. + - const: zam + description: | + The standard Zam extension for misaligned atomics is supported as + ratified in version 20191213 of the riscv-isa-manual. + - const: zba description: | The standard Zba bit-manipulation extension for address generation