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Fri, 27 Oct 2023 12:09:56 -0700 (PDT) From: Luiz Angelo Daros de Luca To: netdev@vger.kernel.org Cc: linus.walleij@linaro.org, alsi@bang-olufsen.dk, andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzk+dt@kernel.org, arinc.unal@arinc9.com, Luiz Angelo Daros de Luca , devicetree@vger.kernel.org Subject: [PATCH net-next v2 2/3] dt-bindings: net: dsa: realtek: add reset controller Date: Fri, 27 Oct 2023 16:00:56 -0300 Message-ID: <20231027190910.27044-3-luizluca@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231027190910.27044-1-luizluca@gmail.com> References: <20231027190910.27044-1-luizluca@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Realtek switches can use a reset controller instead of reset-gpios. Signed-off-by: Luiz Angelo Daros de Luca Cc: devicetree@vger.kernel.org Acked-by: Arınç ÜNAL --- .../devicetree/bindings/net/dsa/realtek.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/realtek.yaml b/Documentation/devicetree/bindings/net/dsa/realtek.yaml index 46e113df77c8..ef7b27c3b1a3 100644 --- a/Documentation/devicetree/bindings/net/dsa/realtek.yaml +++ b/Documentation/devicetree/bindings/net/dsa/realtek.yaml @@ -59,6 +59,9 @@ properties: description: GPIO to be used to reset the whole device maxItems: 1 + resets: + maxItems: 1 + realtek,disable-leds: type: boolean description: | @@ -385,3 +388,75 @@ examples: }; }; }; + + - | + #include + + platform { + switch { + compatible = "realtek,rtl8365mb"; + mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + + resets = <&rst 8>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@0 { + reg = <0>; + label = "wan"; + phy-handle = <ðphy-0>; + }; + ethernet-port@1 { + reg = <1>; + label = "lan1"; + phy-handle = <ðphy-1>; + }; + ethernet-port@2 { + reg = <2>; + label = "lan2"; + phy-handle = <ðphy-2>; + }; + ethernet-port@3 { + reg = <3>; + label = "lan3"; + phy-handle = <ðphy-3>; + }; + ethernet-port@4 { + reg = <4>; + label = "lan4"; + phy-handle = <ðphy-4>; + }; + ethernet-port@5 { + reg = <5>; + ethernet = <ð0>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + compatible = "realtek,smi-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy-0: ethernet-phy@0 { + reg = <0>; + }; + ethphy-1: ethernet-phy@1 { + reg = <1>; + }; + ethphy-2: ethernet-phy@2 { + reg = <2>; + }; + ethphy-3: ethernet-phy@3 { + reg = <3>; + }; + }; + }; + };