@@ -41,12 +41,12 @@ properties:
Gpio base register names.
items:
- const: iocfg0
- - const: iocfg_bm
- - const: iocfg_bl
- - const: iocfg_br
+ - const: iocfg_lt
- const: iocfg_lm
+ - const: iocfg_lb
+ - const: iocfg_bl
- const: iocfg_rb
- - const: iocfg_tl
+ - const: iocfg_rt
- const: eint
interrupt-controller: true
@@ -232,12 +232,12 @@ examples:
<0x10002200 0x0200>,
<0x10002400 0x0200>,
<0x10002600 0x0200>,
- <0x10002A00 0x0200>,
+ <0x10002a00 0x0200>,
<0x10002c00 0x0200>,
<0x1000b000 0x1000>;
- reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",
- "iocfg_br", "iocfg_lm", "iocfg_rb",
- "iocfg_tl", "eint";
+ reg-names = "iocfg0", "iocfg_lt", "iocfg_lm",
+ "iocfg_lb", "iocfg_bl", "iocfg_rb",
+ "iocfg_rt", "eint";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 185>;
There are 8 GPIO physical address bases in mt8186, corresponding to the items of 'reg-names' with the pinctrl driver. but the order of 'reg-names' is not correct. The mt8186 pinctrl driver would get the wrong address, causing the system to restart when regulator initializes . we fix 'reg-names' for pinctrl nodes and the pinctrl-mt8186 example in bindings. Fixes: 338e953f1bd1 ("dt-bindings: pinctrl: mt8186: add pinctrl file and binding document") Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> --- .../bindings/pinctrl/pinctrl-mt8186.yaml | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)