From patchwork Mon Jul 25 10:02:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QWxsZW4tS0ggQ2hlbmcgKOeoi+WGoOWLsyk=?= X-Patchwork-Id: 1660274 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4LrwbL6SfPz9s2R for ; Mon, 25 Jul 2022 20:03:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234229AbiGYKDJ (ORCPT ); Mon, 25 Jul 2022 06:03:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233325AbiGYKDI (ORCPT ); Mon, 25 Jul 2022 06:03:08 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6050717070; Mon, 25 Jul 2022 03:03:07 -0700 (PDT) X-UUID: 45ff22ba9595460c84abf99d461072fc-20220725 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:3434ab75-2918-4955-8476-16cffd297dbd,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,AC TION:release,TS:90 X-CID-INFO: VERSION:1.1.8,REQID:3434ab75-2918-4955-8476-16cffd297dbd,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:90 X-CID-META: VersionHash:0f94e32,CLOUDID:d85edfd3-912a-458b-a623-74f605a77e93,C OID:69509b1c6a38,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 45ff22ba9595460c84abf99d461072fc-20220725 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 76559697; Mon, 25 Jul 2022 18:03:05 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 25 Jul 2022 18:03:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 25 Jul 2022 18:03:04 +0800 From: Allen-KH Cheng To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger CC: , , , , , , "Chen-Yu Tsai" , Allen-KH Cheng Subject: [PATCH 1/2] dt-bindings: pinctrl: mt8186: Add gpio-line-names property Date: Mon, 25 Jul 2022 18:02:52 +0800 Message-ID: <20220725100253.10687-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220725100253.10687-1-allen-kh.cheng@mediatek.com> References: <20220725100253.10687-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the 'gpio-line-names' property to mt8186-pinctrl, as this will be used in devicetrees to describe pin names. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml index 8a2bb8608291..6784885edc5c 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml @@ -28,6 +28,8 @@ properties: gpio-ranges: maxItems: 1 + gpio-line-names: true + reg: description: | Physical address base for gpio base registers. There are 8 different GPIO