| Message ID | 20211209051001.70235-4-marcan@marcan.st |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | dt-bindings: Add trivial Apple t6000/t6001 SoC bindings | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dtbs-check | success | |
| robh/dt-meta-schema | success |
> From: Hector Martin <marcan@marcan.st> > Date: Thu, 9 Dec 2021 14:10:00 +0900 > > This new SoC is compatible with the existing driver, but the block > supports 4 downstream ports, so we need to adjust the binding to > allow that. > > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > .../devicetree/bindings/pci/apple,pcie.yaml | 28 ++++++++++++++----- > 1 file changed, 21 insertions(+), 7 deletions(-) Not 100% certain if we really want to constrain things on a per-SoC basis this way. But it matches my understanding of the hardware. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> > diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml > index ef1d424ec299..7f01e15fc81c 100644 > --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml > @@ -28,19 +28,17 @@ description: | > distributed over the root ports as the OS sees fit by programming > the PCIe controller's port registers. > > -allOf: > - - $ref: /schemas/pci/pci-bus.yaml# > - - $ref: /schemas/interrupt-controller/msi-controller.yaml# > - > properties: > compatible: > items: > - - const: apple,t8103-pcie > + - enum: > + - apple,t8103-pcie > + - apple,t6000-pcie > - const: apple,pcie > > reg: > minItems: 3 > - maxItems: 5 > + maxItems: 6 > > reg-names: > minItems: 3 > @@ -50,6 +48,7 @@ properties: > - const: port0 > - const: port1 > - const: port2 > + - const: port3 > > ranges: > minItems: 2 > @@ -59,7 +58,7 @@ properties: > description: > Interrupt specifiers, one for each root port. > minItems: 1 > - maxItems: 3 > + maxItems: 4 > > msi-parent: true > > @@ -81,6 +80,21 @@ required: > > unevaluatedProperties: false > > +allOf: > + - $ref: /schemas/pci/pci-bus.yaml# > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + - if: > + properties: > + compatible: > + contains: > + const: apple,t8103-pcie > + then: > + properties: > + reg: > + maxItems: 5 > + interrupts: > + maxItems: 3 > + > examples: > - | > #include <dt-bindings/interrupt-controller/apple-aic.h> > -- > 2.33.0
On Thu, 09 Dec 2021 14:10:00 +0900, Hector Martin wrote: > This new SoC is compatible with the existing driver, but the block > supports 4 downstream ports, so we need to adjust the binding to > allow that. > > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > .../devicetree/bindings/pci/apple,pcie.yaml | 28 ++++++++++++++----- > 1 file changed, 21 insertions(+), 7 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml index ef1d424ec299..7f01e15fc81c 100644 --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -28,19 +28,17 @@ description: | distributed over the root ports as the OS sees fit by programming the PCIe controller's port registers. -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - - $ref: /schemas/interrupt-controller/msi-controller.yaml# - properties: compatible: items: - - const: apple,t8103-pcie + - enum: + - apple,t8103-pcie + - apple,t6000-pcie - const: apple,pcie reg: minItems: 3 - maxItems: 5 + maxItems: 6 reg-names: minItems: 3 @@ -50,6 +48,7 @@ properties: - const: port0 - const: port1 - const: port2 + - const: port3 ranges: minItems: 2 @@ -59,7 +58,7 @@ properties: description: Interrupt specifiers, one for each root port. minItems: 1 - maxItems: 3 + maxItems: 4 msi-parent: true @@ -81,6 +80,21 @@ required: unevaluatedProperties: false +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + - if: + properties: + compatible: + contains: + const: apple,t8103-pcie + then: + properties: + reg: + maxItems: 5 + interrupts: + maxItems: 3 + examples: - | #include <dt-bindings/interrupt-controller/apple-aic.h>
This new SoC is compatible with the existing driver, but the block supports 4 downstream ports, so we need to adjust the binding to allow that. Signed-off-by: Hector Martin <marcan@marcan.st> --- .../devicetree/bindings/pci/apple,pcie.yaml | 28 ++++++++++++++----- 1 file changed, 21 insertions(+), 7 deletions(-)