Message ID | 20200421111701.17088-8-marek.behun@nic.cz |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | None | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success |
On Tue, 21 Apr 2020 13:16:59 +0200, Marek Behún wrote: > Document the possibility to reference a PHY and reset-gpios and to set > max-link-speed property. > > Signed-off-by: Marek Behún <marek.behun@nic.cz> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: devicetree@vger.kernel.org > --- > Documentation/devicetree/bindings/pci/aardvark-pci.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index 310ef7145c47..2b8ca920a7fa 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -19,6 +19,9 @@ contain the following properties: - interrupt-map-mask and interrupt-map: standard PCI properties to define the mapping of the PCIe interface to interrupt numbers. - bus-range: PCI bus numbers covered + - phys: the PCIe PHY handle + - max-link-speed: see pci.txt + - reset-gpios: see pci.txt In addition, the Device Tree describing an Aardvark PCIe controller must include a sub-node that describes the legacy interrupt controller @@ -48,6 +51,7 @@ Example: <0 0 0 2 &pcie_intc 1>, <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; + phys = <&comphy1 0>; pcie_intc: interrupt-controller { interrupt-controller; #interrupt-cells = <1>;
Document the possibility to reference a PHY and reset-gpios and to set max-link-speed property. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 4 ++++ 1 file changed, 4 insertions(+)