Message ID | 20190724022310.28010-2-gch981213@gmail.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | MIPS: ralink: add CPU clock detection for MT7621 | expand |
diff --git a/include/dt-bindings/clock/mt7621-clk.h b/include/dt-bindings/clock/mt7621-clk.h new file mode 100644 index 000000000000..a29e14ee2efe --- /dev/null +++ b/include/dt-bindings/clock/mt7621-clk.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Weijie Gao <hackpascal@gmail.com> + */ + +#ifndef __DT_BINDINGS_MT7621_CLK_H +#define __DT_BINDINGS_MT7621_CLK_H + +#define MT7621_CLK_CPU 0 +#define MT7621_CLK_BUS 1 + +#define MT7621_CLK_MAX 2 + +#endif /* __DT_BINDINGS_MT7621_CLK_H */