| Message ID | 20190501092841.9026-5-rasmus.villemoes@prevas.dk |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | soc/fsl/qe: cleanups and new DT binding | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Wed, 2019-05-01 at 09:29 +0000, Rasmus Villemoes wrote: > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > Reading table 4-30, and its footnotes, of the QUICC Engine Block > Reference Manual shows that the set of snum _values_ is not > necessarily just a function of the _number_ of snums, as given in the > fsl,qe-num-snums property. > > As an alternative, to make it easier to add support for other variants > of the QUICC engine IP, this introduces a new binding fsl,qe-snums, > which automatically encodes both the number of snums and the actual > values to use. > > For example, for the MPC8309, one would specify the property as > > fsl,qe-snums = /bits/ 8 < > 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 > 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; I think you need add this example to the qe.txt doc itselft. BTW, what is /bits/ ? > > Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> > --- > Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt > index d7afaff5faff..05f5f485562a 100644 > --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt > @@ -18,7 +18,8 @@ Required properties: > - reg : offset and length of the device registers. > - bus-frequency : the clock frequency for QUICC Engine. > - fsl,qe-num-riscs: define how many RISC engines the QE has. > -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the > +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, > + defining the array of serial number (SNUM) values for the virtual > threads. > > Optional properties: > @@ -34,6 +35,11 @@ Recommended properties > - brg-frequency : the internal clock source frequency for baud-rate > generators in Hz. > > +Deprecated properties > +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use > + for the threads. Use fsl,qe-snums instead to not only specify the > + number of snums, but also their values. > + > Example: > qe@e0100000 { > #address-cells = <1>; > -- > 2.20.1 >
On 01/05/2019 17.12, Joakim Tjernlund wrote: > On Wed, 2019-05-01 at 09:29 +0000, Rasmus Villemoes wrote: >> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. >> >> >> Reading table 4-30, and its footnotes, of the QUICC Engine Block >> Reference Manual shows that the set of snum _values_ is not >> necessarily just a function of the _number_ of snums, as given in the >> fsl,qe-num-snums property. >> >> As an alternative, to make it easier to add support for other variants >> of the QUICC engine IP, this introduces a new binding fsl,qe-snums, >> which automatically encodes both the number of snums and the actual >> values to use. >> >> For example, for the MPC8309, one would specify the property as >> >> fsl,qe-snums = /bits/ 8 < >> 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 >> 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; > > I think you need add this example to the qe.txt doc itselft. Sure, can do. > BTW, what is /bits/ ? That indicates that the numbers should be stored as an array of u8, and not as by default an array of (big-endian) 32-bit numbers. See https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dts-format.txt#n46 This is already used in some bindings and existing .dts (e.g. hwmon/aspeed-pwm-tacho.txt, but git grep shows many more). Rasmus
On Wed, 1 May 2019 09:29:08 +0000, Rasmus Villemoes wrote: > Reading table 4-30, and its footnotes, of the QUICC Engine Block > Reference Manual shows that the set of snum _values_ is not > necessarily just a function of the _number_ of snums, as given in the > fsl,qe-num-snums property. > > As an alternative, to make it easier to add support for other variants > of the QUICC engine IP, this introduces a new binding fsl,qe-snums, > which automatically encodes both the number of snums and the actual > values to use. > > For example, for the MPC8309, one would specify the property as > > fsl,qe-snums = /bits/ 8 < > 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 > 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; > > Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> > --- > Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt index d7afaff5faff..05f5f485562a 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt @@ -18,7 +18,8 @@ Required properties: - reg : offset and length of the device registers. - bus-frequency : the clock frequency for QUICC Engine. - fsl,qe-num-riscs: define how many RISC engines the QE has. -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, + defining the array of serial number (SNUM) values for the virtual threads. Optional properties: @@ -34,6 +35,11 @@ Recommended properties - brg-frequency : the internal clock source frequency for baud-rate generators in Hz. +Deprecated properties +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use + for the threads. Use fsl,qe-snums instead to not only specify the + number of snums, but also their values. + Example: qe@e0100000 { #address-cells = <1>;
Reading table 4-30, and its footnotes, of the QUICC Engine Block Reference Manual shows that the set of snum _values_ is not necessarily just a function of the _number_ of snums, as given in the fsl,qe-num-snums property. As an alternative, to make it easier to add support for other variants of the QUICC engine IP, this introduces a new binding fsl,qe-snums, which automatically encodes both the number of snums and the actual values to use. For example, for the MPC8309, one would specify the property as fsl,qe-snums = /bits/ 8 < 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> --- Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)