From patchwork Wed Apr 17 17:30:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= X-Patchwork-Id: 1087068 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Aj5WOKqF"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44kq5h1T49z9s8m for ; Thu, 18 Apr 2019 03:31:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732762AbfDQRaX (ORCPT ); Wed, 17 Apr 2019 13:30:23 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:40649 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729641AbfDQRaW (ORCPT ); Wed, 17 Apr 2019 13:30:22 -0400 Received: by mail-wr1-f65.google.com with SMTP id h4so33023154wre.7; Wed, 17 Apr 2019 10:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1WIGTjZh4mIwUZpoXVfzkYofixlglZX9sKei53EYiYk=; b=Aj5WOKqF+mSgsjBpWaUeAq+PoNX7zsm2Qhnv00UOVUzIGHv1lshy+IKTXP7Ds7rvCG b8bamc97MPZYshmWApE7ZV4d3pL/JHGQX6Np8pW1gMJXk5FL5uJ4b331fWKXHDNims4V +C7s+9KsDih/C0gAo732PAL9htI9biOlbpXT6qQk+ztwuEI8ldXtWb53WS8K+AZe2+DO W/HKBFSRLxC73Fpg3alKPdk2r0TlLoEhPRc0ubdGwOOnCSturulw79N4xX0RYDP7RC5Z ryA32XxdX8A3bHO+XaEw58jJSQK6+Sq+bfhZwr6bwTnvhtOFoMuvMPF4hkGnn6u5mWtp 39GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1WIGTjZh4mIwUZpoXVfzkYofixlglZX9sKei53EYiYk=; b=q9mL2HVh6rFNsj39EM1ltmHy4QukqChx5EMP3c0UVZ58v9yy0h5guLTnUBIjeie/Vo 9Gv8smaZl0z/NWwcifr+lFM/G7s+pfAmag396EO7ylGLgG2K+Db07Vyelbs2D0Wyt2TP iDbn8wVeX6JyVeCtgUQA4SWcaJUpD47I5avTFO3DYZz/KrtFgcEgYZExuAvPVXkUgHBU 0lwNNETvKTTYKB+DDLB9mEFNkWWUxXzSP4L8JGAnVhMOgQlH7ahwvqG1DSZphhbH2pur NJcowxSFRdHizqvaDDhFyZPUovk2bEmvG4nd1jzqPpbRIJZOIwdkN2QLdppFako0pvTk Rc5Q== X-Gm-Message-State: APjAAAWFIDcu64g9Xky+GVZ//lP7ZIAdduiBvIvgnKMdRrNLFyjIwq3P dqVecYWL/9PSsCLpiW/inDg= X-Google-Smtp-Source: APXvYqwNLMHTqK/0VWA3BJtBaMVwTn+td1BwYu3foSWz0sVgnvDFN9iuDARntEHkupvbB4rlOB+tFA== X-Received: by 2002:adf:b458:: with SMTP id v24mr57683336wrd.46.1555522219879; Wed, 17 Apr 2019 10:30:19 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:1f1:d0f0::df7e:4a05]) by smtp.gmail.com with ESMTPSA id c6sm2669306wmb.21.2019.04.17.10.30.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Apr 2019 10:30:17 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: Rob Herring , Maxime Ripard Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Neil Armstrong , Kevin Hilman Subject: [PATCH v3 1/8] dt-bindings: gpu: mali-midgard: Add resets property Date: Wed, 17 Apr 2019 19:30:24 +0200 Message-Id: <20190417173031.9920-2-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190417173031.9920-1-peron.clem@gmail.com> References: <20190417173031.9920-1-peron.clem@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Neil Armstrong The Amlogic ARM Mali Midgard requires reset controls to power on and software reset the GPU, adds these as optional in the bindings. Signed-off-by: Neil Armstrong Reviewed-by: Rob Herring Signed-off-by: Kevin Hilman --- .../devicetree/bindings/gpu/arm,mali-midgard.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 18a2cde2e5f3..1b1a74129141 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -37,6 +37,20 @@ Optional properties: - operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt for details. +- resets : Phandle of the GPU reset line. + +Vendor-specific bindings +------------------------ + +The Mali GPU is integrated very differently from one SoC to +another. In order to accomodate those differences, you have the option +to specify one more vendor-specific compatible, among: + +- "amlogic,meson-gxm-mali" + Required properties: + - resets : Should contain phandles of : + + GPU reset line + + GPU APB glue reset line Example for a Mali-T760: