From patchwork Wed Apr 10 23:25:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= X-Patchwork-Id: 1083674 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qaDn8zJe"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44fg5D6BzYz9s55 for ; Thu, 11 Apr 2019 09:16:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726825AbfDJXQK (ORCPT ); Wed, 10 Apr 2019 19:16:10 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:42320 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726026AbfDJXPd (ORCPT ); Wed, 10 Apr 2019 19:15:33 -0400 Received: by mail-wr1-f66.google.com with SMTP id g3so4807519wrx.9; Wed, 10 Apr 2019 16:15:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0qACYbWibCn2NYEQtyoZ/KKRf3EQ91V9nFYFBIMWmRE=; b=qaDn8zJeQZMtdJyivrryOFs3/Rh4tV5pTEHX2ACinGABPsL94hSck0mlvN5XXUdLVO 2QshiSkH+/F8/C2sVTH2iSq29/ulGT5/Hr0tOMQBcUDzY7DHfqDJ/bxn096IQqaza05w xG1ce7D8k67kQA0ddLVhuDerJg9hgksF3+OE0M5Ix62EcHMYic0pZna2iysaAEGS8J7U FtBtOb1lvYaEry1Xj0tAqL+RvBPvcm6qvIzeJzFN7f7OKnQFxlD7mcTaM5DLDwjFhZM+ 3YR6jgEC1ry9ZNBgOrn2in5pIa9/Rsfi50i0Ym0C/FVts+Nm24Zwfe+GZpN3GrEZ3A5Y lqtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0qACYbWibCn2NYEQtyoZ/KKRf3EQ91V9nFYFBIMWmRE=; b=qgI4UWxFeGSUoXuTA/Ian1YKwAR7nlVPFuIydiiZUpKOUpB52sQNDAi6/TUPFCH7aU Ud0c3DRneRqD2unkRZSZjM/+K5yy42BL85d7xlBG3zRdmCRNKS/WLugzSPq2LOttX3bt 9RxvsZaW9vgfZs5JZFSrf1i036PC17S7FZ/+/cAPzvsQxPJ60OSiGlvsnFeodLhcVAgD qpO5w/pim9DTkf96KlrcCswG2QeraiGltRiK9Kwr+nKaY1gtqOfWMPQVIcbLcbMkvhB6 +AHeBFV48+p6SbTYj3SUiduLpvREyMmJAmo00BVfckpL2/eZL7K465fkM4btivWu7pb8 UJrw== X-Gm-Message-State: APjAAAViBXFPd+4bBgqTcmwFN94lGBw4Cgzk4B9D/A0SXqVNDsDQ4PUZ 2r49+dsgkO4VL27GvxFSNRc= X-Google-Smtp-Source: APXvYqyBZJPAanBgPDdnRGF5zfKp/yROBhDxSLVw7mZSsuMmbwIMSl2mOOMQa9n0FC87k3dd1GJHVQ== X-Received: by 2002:a5d:530e:: with SMTP id e14mr26166582wrv.18.1554938131542; Wed, 10 Apr 2019 16:15:31 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:1f1:d0f0::df7e:4a05]) by smtp.gmail.com with ESMTPSA id n6sm8504947wmn.48.2019.04.10.16.15.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Apr 2019 16:15:30 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Jagan Teki , Jernej Skrabec Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= Subject: [PATCH 2/8] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Thu, 11 Apr 2019 01:25:37 +0200 Message-Id: <20190410232543.13297-3-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190410232543.13297-1-peron.clem@gmail.com> References: <20190410232543.13297-1-peron.clem@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some SoCs adds a bus clock gate to the Mali Midgard GPU. Add the binding for the bus clock. Signed-off-by: Icenowy Zheng Signed-off-by: Clément Péron --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 1b1a74129141..2e8bbce35695 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -31,6 +31,12 @@ Optional properties: - clocks : Phandle to clock for the Mali Midgard device. +- clock-names : Specify the names of the clocks specified in clocks + when multiple clocks are present. + * core: clock driving the GPU itself (When only one clock is present, + assume it's this clock.) + * bus: bus clock for the GPU + - mali-supply : Phandle to regulator for the Mali device. Refer to Documentation/devicetree/bindings/regulator/regulator.txt for details.