From patchwork Thu Mar 21 17:17:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 1060307 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="AcCv+oJI"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44QD6J5Bjvz9s6w for ; Fri, 22 Mar 2019 04:19:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728729AbfCURSQ (ORCPT ); Thu, 21 Mar 2019 13:18:16 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:40794 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728728AbfCURSP (ORCPT ); Thu, 21 Mar 2019 13:18:15 -0400 Received: by mail-pg1-f196.google.com with SMTP id u9so4631208pgo.7 for ; Thu, 21 Mar 2019 10:18:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o+6vk1Y2CFYMkd90yT6sdZwK6wtMV3xm69BtCbUlzG0=; b=AcCv+oJIKvG54X4XIiKChRRBCd64AapLB03O1VpSotZHO9pkVYNgVtpiqQj2758g9m /bbeXL+FYzwfrqgV56tZjw8rHbWq6/la1mXbKA6fgDz0A2HkIG5ZN+nNlvUEHbXVo4xn 7AnHRKXYM+VFZqQ6SCItRG5ArIKdREVkGNUoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o+6vk1Y2CFYMkd90yT6sdZwK6wtMV3xm69BtCbUlzG0=; b=SMdszzCRueIV8i5XMO/VAa/LSF9pTsLrEJ/3Fitx1/jTIVYvlWypcD7BOObnTborA6 khrr2UazvkcMYb9crBp6CaISvahhg3tW4hQw+mm50u08SDdaz7waxhEr6oPnLSEEDO7c OLHhQXxeWc9l6fbmeznZGThC6KH2T3/iLKJPftsWoshf0zsK7uuAqCdJlyLQ/5WrlWmP AAAMBB294K613P6rv8MfNgaEQN2Z9J7qmYnPao+MvRl/RA4poioWi2cdtnQhY8AIx2qv ZTMh95IikRjX2gDNVFo40GtCGgfDo07Pc7Aoeccyry1k/Rkbg9HV9Ami+oBeRGG0usWD eNxw== X-Gm-Message-State: APjAAAWxkjV0MJfJcdzBP0VTr2xz4pGJKp9wXM6lJG6kWcR92+yoBGQw 9ilJlaLEG5kxFn5fsPtjA6wWXA== X-Google-Smtp-Source: APXvYqwZ7A3/SO3Qyiz1HQnNKa9WPyj7Ebk6Ogmp2TQl43qx6oz1cGdoAJ6LzNGvQPj7G7ny3uHZ5A== X-Received: by 2002:a17:902:8692:: with SMTP id g18mr4519908plo.149.1553188694579; Thu, 21 Mar 2019 10:18:14 -0700 (PDT) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id z6sm20953866pgo.31.2019.03.21.10.18.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Mar 2019 10:18:13 -0700 (PDT) From: Evan Green To: Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , Rob Herring , devicetree@vger.kernel.org, liwei , linux-kernel@vger.kernel.org, Subhash Jadavani , "Martin K. Petersen" , Rob Herring , Mark Rutland Subject: [PATCH v5 1/8] dt-bindings: ufs: Add #reset-cells for Qualcomm controllers Date: Thu, 21 Mar 2019 10:17:53 -0700 Message-Id: <20190321171800.104681-2-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190321171800.104681-1-evgreen@chromium.org> References: <20190321171800.104681-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable Qualcomm UFS controllers to expose the PHY reset via a reset controller. Signed-off-by: Evan Green Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index 5111e9130bc3..f647c09bc62a 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -50,6 +50,8 @@ Optional properties: -lanes-per-direction : number of lanes available per direction - either 1 or 2. Note that it is assume same number of lanes is used both directions at once. If not specified, default is 2 lanes per direction. +- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose + PHY reset from the UFS controller. - resets : reset node register - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. @@ -79,4 +81,5 @@ Example: reset-names = "rst"; phys = <&ufsphy1>; phy-names = "ufsphy"; + #reset-cells = <1>; };