From patchwork Wed Feb 13 23:25:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 1041700 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="axupwHCW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 440FzX19K8z9sN4 for ; Thu, 14 Feb 2019 10:27:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390292AbfBMX0W (ORCPT ); Wed, 13 Feb 2019 18:26:22 -0500 Received: from mail-pl1-f196.google.com ([209.85.214.196]:40312 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389298AbfBMX0V (ORCPT ); Wed, 13 Feb 2019 18:26:21 -0500 Received: by mail-pl1-f196.google.com with SMTP id bj4so1976365plb.7 for ; Wed, 13 Feb 2019 15:26:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tTrz5iCREgQGXYUDyQ4vY7F8M1o2Gjn3QDNWgZd/TLo=; b=axupwHCWl0wuJEKGzGgbKByB637wsRkny0N9pdp60VtrWi34+nGnjhpAQSlk3sCdBx aeZzDIkbpfCrnqre4f9l3nhqIBts3uiC/8hMuwFIRdstH7TR4xzfFj8X2H2sECdB6LoO OjjAhCOQfTyMV4i9z+MxqC9hM2URbttTmmZp8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tTrz5iCREgQGXYUDyQ4vY7F8M1o2Gjn3QDNWgZd/TLo=; b=MXH/0+7sVrjCpz3F0tvte5aKCHmHrpGKh2vvVoU8+DAF1xbTqnTTl9OxQRJ3mZKMTy pDSi6Z3QqTkPe9+XX8PUHYhCi3b6/yUyBQyE9K2O5dmvicXnRPZSXE5C0mu0xDY/difr pkvXNra+HiAa5kGO4qTNDCDGXx7s0SutcalMlAtEtDkhcUxc3lich1Gq2NvlDlmz/lhy A/KEpPCpJ6aMz5ngTAX8zo+09Ezd85nPVfNQ+mH24Ei5XSoXAdaKlfslpimMdAoI5/uS 0JmPUoDenZ0ovsxC8Ws5DbbHam34/X2bc3OxEUyTykW5+dSBCg0rL/LcIwTFJ4vhfkQv MHsQ== X-Gm-Message-State: AHQUAua/Qgm1k5oDkXSuHSi4WvMzeSaRQzEexC4zwPd1f5Y3NXghAtXO Zwrv0hxON5JAEN9RfZ/Znbn7rA== X-Google-Smtp-Source: AHgI3IZcwFyihgNlx4RQ6DFsU8JJ7gdAfJxyxUpSK4QBk41uq7EShRRB47nqsWSuGstLSo4O1A07Yw== X-Received: by 2002:a17:902:ba90:: with SMTP id k16mr784980pls.214.1550100380615; Wed, 13 Feb 2019 15:26:20 -0800 (PST) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id d129sm560660pfc.31.2019.02.13.15.26.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Feb 2019 15:26:19 -0800 (PST) From: Evan Green To: Andy Gross , Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , Rob Herring , devicetree@vger.kernel.org, Mark Rutland , Rob Herring , linux-kernel@vger.kernel.org Subject: [PATCH v4 2/8] dt-bindings: phy-qcom-qmp: Add UFS PHY reset Date: Wed, 13 Feb 2019 15:25:20 -0800 Message-Id: <20190213232526.26995-3-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190213232526.26995-1-evgreen@chromium.org> References: <20190213232526.26995-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a required reset to the SDM845 UFS phy to express the PHY reset bit inside the UFS controller register space. Before this change, this reset was not expressed in the DT, and the driver utilized two different callbacks (phy_init and phy_poweron) to implement a two-phase initialization procedure that involved deasserting this reset between init and poweron. This abused the two callbacks and diluted their purpose. That scheme does not work as regulators cannot be turned off in phy_poweroff because they were turned on in init, rather than poweron. The net result is that regulators are left on in suspend that shouldn't be. This new scheme gives the UFS reset to the PHY, so that it can fully initialize itself in a single callback. We can then turn regulators on during poweron and off during poweroff. Signed-off-by: Evan Green Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd --- I realize I'm not supposed to add a required property after the fact, but given that the UFS DT nodes that would use this binding are not yet upstream (and this would be the first), I was hoping to squeak by. Changes in v4: None Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index 5d181fc3cc18..4a78ba8b85bc 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -59,7 +59,8 @@ Required properties: one for each entry in reset-names. - reset-names: "phy" for reset of phy block, "common" for phy common block reset, - "cfg" for phy's ahb cfg block reset. + "cfg" for phy's ahb cfg block reset, + "ufsphy" for the PHY reset in the UFS controller. For "qcom,ipq8074-qmp-pcie-phy" must contain: "phy", "common". @@ -74,7 +75,8 @@ Required properties: "phy", "common". For "qcom,sdm845-qmp-usb3-uni-phy" must contain: "phy", "common". - For "qcom,sdm845-qmp-ufs-phy": no resets are listed. + For "qcom,sdm845-qmp-ufs-phy": must contain: + "ufsphy". - vdda-phy-supply: Phandle to a regulator supply to PHY core block. - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.