From patchwork Wed Feb 13 23:25:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 1041698 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="ZRWrc1MW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 440Fyg4klPz9sMr for ; Thu, 14 Feb 2019 10:26:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389763AbfBMX0T (ORCPT ); Wed, 13 Feb 2019 18:26:19 -0500 Received: from mail-pl1-f196.google.com ([209.85.214.196]:44271 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389702AbfBMX0S (ORCPT ); Wed, 13 Feb 2019 18:26:18 -0500 Received: by mail-pl1-f196.google.com with SMTP id p4so1972773plq.11 for ; Wed, 13 Feb 2019 15:26:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zVtYgVjd/xRzchJj83lLQZj8nZX16NvmAHavBWvuhDY=; b=ZRWrc1MWCe28Sf4cWnA4KkYW2AVIFLMTieUDT4B+cS52QenfIY3gKhtcFDpHwZS1na 0oNq9FWPfgffRBHMNFwb8xjNdB39YvuZ1D/jKrB1v79DbpsWkuUynY6/8q3LWVEah5NN 0gm+I9E1BXopN8kZZoGLwS7LtupMKUcptj1ss= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zVtYgVjd/xRzchJj83lLQZj8nZX16NvmAHavBWvuhDY=; b=qHt5bprZePL54wSm6yLbMWC7frkS/p1oA5iI5SJOnWUwA3ojFQnr9i2HybU159t/I6 cRp0DGeOnsF4bPZsmTTogUjGB4xkkE4ZiKOIfI4oocpDh+EqzhBQNLGkRelo8ZIoKFzA 1gLjQNCZf+aT4IbDC16DQYsgYMbdhwoxIa1kKqR0Vg3WvijhxLjcivQdmZGIQrWsHw7g M49jrUVZFKxtMlEzg4h+9mfsQOnHRhQXU2v3CUAVj/+YqJJUN//b6LYUEERbec7BJk8o NpB3eHDaXCTaCft3yfyNnbyXXwP3bzso83UiriuAmiPAd9OsR8ZXnt4A2dMrfo4ox7WH J1BA== X-Gm-Message-State: AHQUAuatwlpwxH+88o2lgyI5YObdfnpzo3X21GdpLLGiE7oPotZaV8DD C9SiD5liKFzknJTI5ppiy0Sfnw== X-Google-Smtp-Source: AHgI3IZJoQOlHjdGf+UsBpTh6Gif7TXeZK7nMMGs8WkyFT4Kf0Obam1yseqPmfZ5ISVKGYWQ+pIb7g== X-Received: by 2002:a17:902:9a03:: with SMTP id v3mr734284plp.187.1550100378255; Wed, 13 Feb 2019 15:26:18 -0800 (PST) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id d129sm560660pfc.31.2019.02.13.15.26.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Feb 2019 15:26:17 -0800 (PST) From: Evan Green To: Andy Gross , Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , Rob Herring , devicetree@vger.kernel.org, liwei , linux-kernel@vger.kernel.org, Subhash Jadavani , Rob Herring , "Martin K. Petersen" , Mark Rutland Subject: [PATCH v4 1/8] dt-bindings: ufs: Add #reset-cells for Qualcomm controllers Date: Wed, 13 Feb 2019 15:25:19 -0800 Message-Id: <20190213232526.26995-2-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190213232526.26995-1-evgreen@chromium.org> References: <20190213232526.26995-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable Qualcomm UFS controllers to expose the PHY reset via a reset controller. Signed-off-by: Evan Green Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd --- Changes in v4: None Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index 8cf59452c675..e2460b666ae4 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -47,6 +47,8 @@ Optional properties: -lanes-per-direction : number of lanes available per direction - either 1 or 2. Note that it is assume same number of lanes is used both directions at once. If not specified, default is 2 lanes per direction. +- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose + PHY reset from the UFS controller. - resets : reset node register - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. @@ -76,4 +78,5 @@ Example: reset-names = "rst"; phys = <&ufsphy1>; phy-names = "ufsphy"; + #reset-cells = <1>; };