From patchwork Tue Feb 5 18:58:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 1037074 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="Aas1a+AI"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43vDRR4rh1z9sLw for ; Wed, 6 Feb 2019 06:00:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729598AbfBES7c (ORCPT ); Tue, 5 Feb 2019 13:59:32 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:35795 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729557AbfBES7b (ORCPT ); Tue, 5 Feb 2019 13:59:31 -0500 Received: by mail-pl1-f195.google.com with SMTP id p8so1903360plo.2 for ; Tue, 05 Feb 2019 10:59:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mvo9vkE2z4ukp0XCRY8v+Ly8mGLi9zihvjjjcTgDx70=; b=Aas1a+AIRTx2Uo7LT4d5xTmzN2/j1ee5NoEOj+vB5IhpdSbOgRj9nF8fNSyEExQ0zd Nltl3NYwE5mjKnr1ujKE//bJezVYYPjiLWEjBi8f2X+Rq1w9k2sVGKMGfkj/Te3FBbMC gScjNNo8dCicWYwXAV/htmNH/ovLbtmFd7sf0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mvo9vkE2z4ukp0XCRY8v+Ly8mGLi9zihvjjjcTgDx70=; b=R5Q1RzD4sUAZEAGe/ITxRel6FvE4Sr+MGPl4ZAdFkNjO5rid13owwBvEWb4+H37ozf eHgQ17aBmHfI8W8VJcLtQqJIS3Z5bCW2BvGlLvfaz6vZdyLVK5pcLx13iBiW7fqj6Gz/ rSk+c8PMunAJ8Pjc+l5you2LTXTIv0h/PRtJgMxsmxCDnr3TfJGxsHAFHnF7iSZb5iQe d3cUqa2ALBCCV3G/yO94yJaZ1eRPmJ82UufmdEtLBSZOuM+swRpcl4gNwOfGUHRur9pQ zl1Usqdiaj8Tt9noVkWSj6XHx4tvs4Vg7nT7dy49E+FLcYRutqtnBWhFwNaw+J2VvQZo czFg== X-Gm-Message-State: AHQUAubpnyYtjYmFYGFLbNo3vSqzvFMBZ5jet5FWOEKdWHEYttBqt+LY xXDT7xFFValvukZ5qTa9a8EW7Q== X-Google-Smtp-Source: AHgI3IZt/fXho4vFm07w01VCCpBkivq3kFzwcmgZfPnCarigAJPjTLTuspKz9NiNrpkoFA08zs00AQ== X-Received: by 2002:a17:902:9a9:: with SMTP id 38mr6498039pln.204.1549393171250; Tue, 05 Feb 2019 10:59:31 -0800 (PST) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id m3sm6424435pfi.102.2019.02.05.10.59.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Feb 2019 10:59:30 -0800 (PST) From: Evan Green To: Andy Gross , Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , Rob Herring , devicetree@vger.kernel.org, Mark Rutland , Rob Herring , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/8] dt-bindings: phy-qcom-qmp: Add UFS PHY reset Date: Tue, 5 Feb 2019 10:58:56 -0800 Message-Id: <20190205185902.106085-3-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205185902.106085-1-evgreen@chromium.org> References: <20190205185902.106085-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a required reset to the SDM845 UFS phy to express the PHY reset bit inside the UFS controller register space. Before this change, this reset was not expressed in the DT, and the driver utilized two different callbacks (phy_init and phy_poweron) to implement a two-phase initialization procedure that involved deasserting this reset between init and poweron. This abused the two callbacks and diluted their purpose. That scheme does not work as regulators cannot be turned off in phy_poweroff because they were turned on in init, rather than poweron. The net result is that regulators are left on in suspend that shouldn't be. This new scheme gives the UFS reset to the PHY, so that it can fully initialize itself in a single callback. We can then turn regulators on during poweron and off during poweroff. Signed-off-by: Evan Green Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd --- I realize I'm not supposed to add a required property after the fact, but given that the UFS DT nodes that would use this binding are not yet upstream (and this would be the first), I was hoping to squeak by. Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index 4ff26dbf4310..49b8a5eed3cd 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -56,7 +56,8 @@ Required properties: one for each entry in reset-names. - reset-names: "phy" for reset of phy block, "common" for phy common block reset, - "cfg" for phy's ahb cfg block reset. + "cfg" for phy's ahb cfg block reset, + "ufsphy" for the PHY reset in the UFS controller. For "qcom,ipq8074-qmp-pcie-phy" must contain: "phy", "common". @@ -70,7 +71,8 @@ Required properties: "phy", "common". For "qcom,sdm845-qmp-usb3-uni-phy" must contain: "phy", "common". - For "qcom,sdm845-qmp-ufs-phy": no resets are listed. + For "qcom,sdm845-qmp-ufs-phy": must contain: + "ufsphy". - vdda-phy-supply: Phandle to a regulator supply to PHY core block. - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.